198 lines
7.3 KiB
C
198 lines
7.3 KiB
C
/*
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* fenv.h
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*
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* Structures and constants defining, and functions for management of,
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* the floating point environment.
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*
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* $Id: fenv.h,v af569eb5aad7 2017/02/27 17:46:27 keithmarshall $
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*
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* Written by Danny Smith <dannysmith@users.sourceforge.net>
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* Copyright (C) 2002, 2003, 2005-2007, 2017, MinGW.org Project
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*
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice, this permission notice, and the following
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* disclaimer shall be included in all copies or substantial portions of
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* the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OF OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef _FENV_H
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#pragma GCC system_header
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#define _FENV_H
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/* All MinGW headers are required to include <_mingw.h>
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*/
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#include <_mingw.h>
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/* FPU status word flags indicating exceptions. Each is represented
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* by a single bit, sequentially and contiguously assigned to the low
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* order bits of the status word, enumerated from lowest:
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*/
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enum
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{ __FE_INVALID_EXCEPT_FLAG_SHIFT,
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__FE_DENORMAL_EXCEPT_FLAG_SHIFT,
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__FE_DIVBYZERO_EXCEPT_FLAG_SHIFT,
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__FE_OVERFLOW_EXCEPT_FLAG_SHIFT,
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__FE_UNDERFLOW_EXCEPT_FLAG_SHIFT,
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__FE_INEXACT_EXCEPT_FLAG_SHIFT,
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/* The final entry in the shift enumeration represents the order
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* of the rightmost bit which does NOT represent an exception flag;
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* we use it as a high water mark, for generation of the aggregate
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* mask for ALL exception flags; arithmetically, this becomes the
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* numeric value of a pseudo-flag placed at the high water mark,
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* less one.
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*/
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__FE_ALL_EXCEPT_HWM_SHIFT
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# define FE_ALL_EXCEPT ((0x01 << __FE_ALL_EXCEPT_HWM_SHIFT) - 1)
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};
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#define __FE_EXCEPT(__NAME__) (0x01 << __FE_##__NAME__##_EXCEPT_FLAG_SHIFT)
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#define FE_INVALID __FE_EXCEPT(INVALID)
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#define FE_DENORMAL __FE_EXCEPT(DENORMAL)
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#define FE_DIVBYZERO __FE_EXCEPT(DIVBYZERO)
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#define FE_OVERFLOW __FE_EXCEPT(OVERFLOW)
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#define FE_UNDERFLOW __FE_EXCEPT(UNDERFLOW)
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#define FE_INEXACT __FE_EXCEPT(INEXACT)
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/* FPU control word flags to specify rounding mode; this may be
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* represented as a selection from a four-way enumeration...
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*/
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enum
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{ __FE_ROUND_TONEAREST,
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__FE_ROUND_DOWNWARD,
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__FE_ROUND_UPWARD,
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__FE_ROUND_TOWARDZERO
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};
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/* ...with the actual flag bits offset 10-bits from the rightmost
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* bit in the control word; hence, the rounding mode macros become:
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*/
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#define __FE_ROUND(__MODE__) (__FE_ROUND_##__MODE__ << 10)
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#define FE_TONEAREST __FE_ROUND(TONEAREST)
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#define FE_DOWNWARD __FE_ROUND(DOWNWARD)
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#define FE_UPWARD __FE_ROUND(UPWARD)
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#define FE_TOWARDZERO __FE_ROUND(TOWARDZERO)
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/* The MXCSR exception flags are the same as those for the FPU...
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*/
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#define __MXCSR_EXCEPT_FLAG_SHIFT 0
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/* ...and the corresponding mask bits are offset by a further 7-bit
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* shift to the left...
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*/
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#define __MXCSR_EXCEPT_MASK_SHIFT 7
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/* ...while the MXCSR rounding mode flags adopt the same enumeration,
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* but are offset a further 3-bits to the left of those representing
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* the FPU rounding mode selection flags.
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*/
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#define __MXCSR_ROUND_FLAG_SHIFT 3
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#ifndef RC_INVOKED
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/* For now, support only for the basic abstraction of flags that are
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* either set or clear; fexcept_t could be a structure that holds more
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* info about the fp environment.
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*/
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typedef unsigned short fexcept_t;
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typedef struct __fenv_t
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{ /* This 28-byte structure represents the entire floating point
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* environment of the FPU, as stored by either the "fnstenv", or
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* the "fstenv" instruction.
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*/
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unsigned short __control_word;
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unsigned short __unused0;
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unsigned short __status_word;
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unsigned short __unused1;
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unsigned short __tag_word;
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unsigned short __unused2;
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unsigned int __ip_offset; /* instruction pointer offset */
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unsigned short __ip_selector;
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unsigned short __opcode;
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unsigned int __data_offset;
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unsigned short __data_selector;
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unsigned short __unused3;
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/* The structure is extended, beyond the 28 byte requirement to
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* store the FPU state, by 4 additional bytes, which then makes it
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* sufficient to also store the contents of the MXCSR register, as
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* stored by the "stmxcsr" instruction, (if the CPU supports it).
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*/
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unsigned int __mxcsr; /* content of the MXCSR register */
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} fenv_t;
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/* The ISO-C99 standard, section 7.6 paragraph 8 requires us to define
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* the FE_DFL_ENV macro; it specifies restoration of the FPU environment
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* to its default state, as established at application start-up.
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*/
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#define FE_DFL_ENV ((const fenv_t *)(0))
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/* Paragraph 9 of the same section of ISO-C99 provides for the definition
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* of implementation-specific macros to identify alternative predefined
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* FPU environment configuration; we exploit this licence to offer:
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*
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* FP_PC64_ENV -- Intel standard 80-bit (64-bit precision); this is
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* consistent with IEEE-754 extended precision, and
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* the configuration preferred by MinGW, because it
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* matches the format of GCC's 80-bit long doubles.
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*
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* FP_PC53_ENV -- IEEE-754 64-bit (53-bit precision); consistent
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* with Microsoft's preferred FPU configuration;
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* (they offer no better than 64-bit long doubles).
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*/
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#define FE_PC64_ENV ((const fenv_t *)(-1))
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#define FE_PC53_ENV ((const fenv_t *)(-2))
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/* The following pair of additional predefined environment macros serve
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* as aliases for the preceding pair, respectively, with the added side
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* effect that, when passed to fesetenv(), each causes its respective
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* alias to become associated with FE_DFL_ENV in subsequent calls.
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*/
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#define FE_PD64_ENV ((const fenv_t *)(-3))
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#define FE_PD53_ENV ((const fenv_t *)(-4))
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_BEGIN_C_DECLS
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/*TODO: Some of these could be inlined */
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/* ISO-C99 section 7.6.2 -- Floating Point Exception Handling
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*/
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extern __cdecl __MINGW_NOTHROW int feclearexcept (int);
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extern __cdecl __MINGW_NOTHROW int fegetexceptflag (fexcept_t *, int);
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extern __cdecl __MINGW_NOTHROW int feraiseexcept (int);
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extern __cdecl __MINGW_NOTHROW int fesetexceptflag (const fexcept_t *, int);
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extern __cdecl __MINGW_NOTHROW int fetestexcept (int);
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/* ISO-C99 section 7.6.3 -- Floating Point Rounding Mode Control
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*/
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extern __cdecl __MINGW_NOTHROW int fegetround (void);
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extern __cdecl __MINGW_NOTHROW int fesetround (int);
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/* ISO-C99 section 7.6.4 -- Floating Point Environment Configuration
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*/
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extern __cdecl __MINGW_NOTHROW int fegetenv (fenv_t *);
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extern __cdecl __MINGW_NOTHROW int fesetenv (const fenv_t *);
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extern __cdecl __MINGW_NOTHROW int feupdateenv (const fenv_t *);
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extern __cdecl __MINGW_NOTHROW int feholdexcept (fenv_t *);
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_END_C_DECLS
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#endif /* ! RC_INVOKED */
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#endif /* !_FENV_H: $RCSfile: fenv.h,v $: end of file */
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