Merge master into staging-next

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github-actions[bot] 2021-04-18 00:15:36 +00:00 committed by GitHub
commit 0ef3d3e462
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13 changed files with 225 additions and 16 deletions

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@ -1,26 +1,40 @@
{ mkDerivation
, lib, stdenv
, lib
, stdenv
, fetchFromGitHub
, nix-update-script
, qmake
, qtbase
, qtmultimedia
, libvorbis
, rtmidi
}:
mkDerivation rec {
pname = "ptcollab";
version = "0.3.5.1";
version = "0.4.0";
src = fetchFromGitHub {
owner = "yuxshao";
repo = "ptcollab";
rev = "v${version}";
sha256 = "1ahfxjm1chz8k65rs7rgn4s2bgippq58fjcxl8fr21pzn718wqf1";
sha256 = "1yfnf47saxxj17x0vyxihr343kp7gz3fashzky79j80sqlm6ng85";
};
postPatch = ''
substituteInPlace src/editor.pro \
--replace '/usr/include/rtmidi' '${rtmidi}/include/rtmidi'
'';
nativeBuildInputs = [ qmake ];
buildInputs = [ qtbase qtmultimedia libvorbis ];
buildInputs = [ qtbase qtmultimedia libvorbis rtmidi ];
passthru = {
updateScript = nix-update-script {
attrPath = pname;
};
};
meta = with lib; {
description = "Experimental pxtone editor where you can collaborate with friends";

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@ -2,11 +2,11 @@
python3Packages.buildPythonApplication rec {
pname = "FlexGet";
version = "3.1.106";
version = "3.1.110";
src = python3Packages.fetchPypi {
inherit pname version;
sha256 = "f0ff300a1762d701b77eb16142dcc13d9d099bbed695f1e950392c1d1bb988eb";
sha256 = "e8642dcbbfe941e2d2def7bf2e28889082a78c1d041edb33dae180036832a96b";
};
postPatch = ''

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@ -1,4 +1,4 @@
{ stdenv, fetchFromGitHub, gnat, zlib, llvm, lib
{ stdenv, fetchFromGitHub, callPackage, gnat, zlib, llvm, lib
, backend ? "mcode" }:
assert backend == "mcode" || backend == "llvm";
@ -17,6 +17,7 @@ stdenv.mkDerivation rec {
LIBRARY_PATH = "${stdenv.cc.libc}/lib";
buildInputs = [ gnat zlib ] ++ lib.optional (backend == "llvm") [ llvm ];
propagatedBuildInputs = lib.optionals (backend == "llvm") [ zlib ];
preConfigure = ''
# If llvm 7.0 works, 7.x releases should work too.
@ -30,6 +31,15 @@ stdenv.mkDerivation rec {
enableParallelBuilding = true;
passthru = {
# run with either of
# nix-build -A ghdl-mcode.passthru.tests
# nix-build -A ghdl-llvm.passthru.tests
tests = {
simple = callPackage ./test-simple.nix { inherit backend; };
};
};
meta = with lib; {
homepage = "https://github.com/ghdl/ghdl";
description = "VHDL 2008/93/87 simulator";

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@ -0,0 +1,8 @@
simple-tb.vhd:71:5:@700ms:(report note): 32
simple-tb.vhd:71:5:@900ms:(report note): 78
simple-tb.vhd:71:5:@1100ms:(report note): 105
simple-tb.vhd:71:5:@1300ms:(report note): 120
simple-tb.vhd:71:5:@1500ms:(report note): 79
simple-tb.vhd:71:5:@1700ms:(report note): 83
simple-tb.vhd:71:5:@1900ms:(report note): 32
simple-tb.vhd:75:1:@2100ms:(report note): All tests passed.

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@ -0,0 +1,78 @@
library ieee;
use IEEE.STD_LOGIC_1164.all;
use ieee.numeric_std.all;
library STD;
use STD.textio.all;
entity tb is
end tb;
architecture beh of tb is
component simple
port (
CLK, RESET : in std_ulogic;
DATA_OUT : out std_ulogic_vector(7 downto 0);
DONE_OUT : out std_ulogic
);
end component;
signal data : std_ulogic_vector(7 downto 0) := "00100000";
signal clk : std_ulogic;
signal RESET : std_ulogic := '0';
signal done : std_ulogic := '0';
signal cyclecount : integer := 0;
constant cycle_time_c : time := 200 ms;
constant maxcycles : integer := 100;
begin
simple1 : simple
port map (
CLK => clk,
RESET => RESET,
DATA_OUT => data,
DONE_OUT => done
);
clk_process : process
begin
clk <= '0';
wait for cycle_time_c/2;
clk <= '1';
wait for cycle_time_c/2;
end process;
count_process : process(CLK)
begin
if (CLK'event and CLK ='1') then
if (RESET = '1') then
cyclecount <= 0;
else
cyclecount <= cyclecount + 1;
end if;
end if;
end process;
test : process
begin
RESET <= '1';
wait until (clk'event and clk='1');
wait until (clk'event and clk='1');
RESET <= '0';
wait until (clk'event and clk='1');
for cyclecnt in 1 to maxcycles loop
exit when done = '1';
wait until (clk'event and clk='1');
report integer'image(to_integer(unsigned(data)));
end loop;
wait until (clk'event and clk='1');
report "All tests passed." severity NOTE;
wait;
end process;
end beh;

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@ -0,0 +1,45 @@
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.NUMERIC_STD.ALL;
use IEEE.STD_LOGIC_MISC.or_reduce;
entity simple is
port (
CLK, RESET : in std_ulogic;
DATA_OUT : out std_ulogic_vector(7 downto 0);
DONE_OUT : out std_ulogic
);
end simple;
architecture beh of simple is
signal data : std_ulogic_vector(7 downto 0);
signal done: std_ulogic;
begin
proc_ctr : process(CLK)
begin
if (CLK = '1' and CLK'event) then
if (RESET = '1') then
data <= "01011111";
done <= '0';
else
case data is
when "00100000" => data <= "01001110";
when "01001110" => data <= "01101001";
when "01101001" => data <= "01111000";
when "01111000" => data <= "01001111";
when "01001111" => data <= "01010011";
when others => data <= "00100000";
end case;
done <= not or_reduce(data xor "01010011");
end if;
end if;
end process;
DATA_OUT <= data;
DONE_OUT <= done;
end beh;

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@ -0,0 +1,23 @@
{ stdenv, ghdl-llvm, ghdl-mcode, backend }:
let
ghdl = if backend == "llvm" then ghdl-llvm else ghdl-mcode;
in
stdenv.mkDerivation {
name = "ghdl-test-simple";
meta.timeout = 300;
nativeBuildInputs = [ ghdl ];
buildCommand = ''
cp ${./simple.vhd} simple.vhd
cp ${./simple-tb.vhd} simple-tb.vhd
mkdir -p ghdlwork
ghdl -a --workdir=ghdlwork --ieee=synopsys simple.vhd simple-tb.vhd
ghdl -e --workdir=ghdlwork --ieee=synopsys -o sim-simple tb
'' + (if backend == "llvm" then ''
./sim-simple --assert-level=warning > output.txt
'' else ''
ghdl -r --workdir=ghdlwork --ieee=synopsys tb > output.txt
'') + ''
diff output.txt ${./expected-output.txt} && touch $out
'';
}

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@ -2,13 +2,13 @@
stdenv.mkDerivation rec {
pname = "grim";
version = "1.3.1";
version = "1.3.2";
src = fetchFromGitHub {
owner = "emersion";
repo = pname;
rev = "v${version}";
sha256 = "0fjmjq0ws9rlblkcqxxw2lv7zvvyi618jqzlnz5z9zb477jwdfib";
sha256 = "sha256-71dmYENfPX8YHcTlR2F67EheoewicePMKm9/wPbmj9A=";
};
nativeBuildInputs = [

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@ -0,0 +1,29 @@
{ lib, rustPlatform, fetchFromGitHub, installShellFiles }:
rustPlatform.buildRustPackage rec {
pname = "macchina";
version = "0.6.9";
src = fetchFromGitHub {
owner = "Macchina-CLI";
repo = pname;
rev = "v${version}";
sha256 = "sha256-y23gpYDnYoiTJcNyWKslVenPTXcCrOvxq+0N9PjQN3g=";
};
cargoSha256 = "sha256-jfLj8kLBG6AeeYo421JCl1bMqWwOGiwQgv7AEomtFcY=";
nativeBuildInputs = [ installShellFiles ];
postInstall = ''
installShellCompletion target/completions/*.{bash,fish}
'';
meta = with lib; {
description = "A fast, minimal and customizable system information fetcher";
homepage = "https://github.com/Macchina-CLI/macchina";
changelog = "https://github.com/Macchina-CLI/macchina/releases/tag/v${version}";
license = with licenses; [ mit ];
maintainers = with maintainers; [ _414owen ];
};
}

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@ -2,16 +2,16 @@
rustPlatform.buildRustPackage rec {
pname = "watchexec";
version = "1.15.0";
version = "1.15.1";
src = fetchFromGitHub {
owner = pname;
repo = pname;
rev = version;
sha256 = "1b0ds04q4g8xcgwkziwb5hsi7v73w9y0prvhxz880zzh930652n2";
sha256 = "1xznhfljvsvc0ykv5h1wg31n93v96lvhbxfhavxivq3b0xh5vxrw";
};
cargoSha256 = "0jpfgyz5l4fdb5cnqmadzjzrvc6dwgray4b0mx80pghpjw8a8qfb";
cargoSha256 = "00dampnsnpzmchjcn0j5zslx17i0qgrv99gq772n0683m1l2lfq3";
nativeBuildInputs = [ installShellFiles ];

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@ -30,11 +30,11 @@ let
in
stdenv.mkDerivation rec {
pname = "tor";
version = "0.4.5.6";
version = "0.4.5.7";
src = fetchurl {
url = "https://dist.torproject.org/${pname}-${version}.tar.gz";
sha256 = "0cz78pjw2bc3kl3ziip1nhhbq89crv315rf1my3zmmgd9xws7jr2";
sha256 = "0x7hhl0svfc4yh9xvq7kkzgmwjcw1ak9i0794wjg4biy2fmclzs4";
};
outputs = [ "out" "geoip" ];

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@ -13,13 +13,13 @@
stdenv.mkDerivation rec {
pname = "slurp";
version = "1.3.1";
version = "1.3.2";
src = fetchFromGitHub {
owner = "emersion";
repo = "slurp";
rev = "v${version}";
sha256 = "1fby2v2ylcadgclds05wpkl9xi2r9dfz49dqyqpn20rjv1wnz3jv";
sha256 = "sha256-5ZB34rqLyZmfjT/clxNRDmF0qgITFZ5xt/gIEXQzvQE=";
};
nativeBuildInputs = [

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@ -6440,6 +6440,8 @@ in
macchanger = callPackage ../os-specific/linux/macchanger { };
macchina = callPackage ../tools/misc/macchina { };
madlang = haskell.lib.justStaticExecutables haskellPackages.madlang;
maeparser = callPackage ../development/libraries/maeparser { };