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Indentation of a SW SPI file

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This commit is contained in:
Scott Lahteine 2017-12-25 09:34:33 -06:00
parent 1a827d5b68
commit 2c4e03d2cf
1 changed files with 98 additions and 97 deletions
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33
Marlin/src/HAL/HAL_DUE/u8g_com_HAL_DUE_st7920_sw_spi.cpp
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@ -57,25 +57,26 @@
#ifdef __SAM3X8E__ #ifdef __SAM3X8E__
#include <U8glib.h> #include <U8glib.h>
#include <Arduino.h> #include <Arduino.h>
#include "../../core/macros.h" #include "../../core/macros.h"
void u8g_SetPIOutput_DUE(u8g_t *u8g, uint8_t pin_index) { void u8g_SetPIOutput_DUE(u8g_t *u8g, uint8_t pin_index) {
PIO_Configure(g_APinDescription[u8g->pin_list[pin_index]].pPort, PIO_OUTPUT_1, PIO_Configure(g_APinDescription[u8g->pin_list[pin_index]].pPort, PIO_OUTPUT_1,
g_APinDescription[u8g->pin_list[pin_index]].ulPin, g_APinDescription[u8g->pin_list[pin_index]].ulPinConfiguration); // OUTPUT g_APinDescription[u8g->pin_list[pin_index]].ulPin, g_APinDescription[u8g->pin_list[pin_index]].ulPinConfiguration); // OUTPUT
} }
void u8g_SetPILevel_DUE(u8g_t *u8g, uint8_t pin_index, uint8_t level) { void u8g_SetPILevel_DUE(u8g_t *u8g, uint8_t pin_index, uint8_t level) {
volatile Pio* port = g_APinDescription[u8g->pin_list[pin_index]].pPort; volatile Pio* port = g_APinDescription[u8g->pin_list[pin_index]].pPort;
uint32_t mask = g_APinDescription[u8g->pin_list[pin_index]].ulPin; uint32_t mask = g_APinDescription[u8g->pin_list[pin_index]].ulPin;
if (level) port->PIO_SODR = mask; if (level) port->PIO_SODR = mask;
else port->PIO_CODR = mask; else port->PIO_CODR = mask;
} }
#define nop() __asm__ __volatile__("nop;\n\t":::) #define nop() __asm__ __volatile__("nop;\n\t":::)
void __delay_4cycles(uint32_t cy) __attribute__ ((weak)); void __delay_4cycles(uint32_t cy) __attribute__ ((weak));
FORCE_INLINE void __delay_4cycles(uint32_t cy) { // +1 cycle FORCE_INLINE void __delay_4cycles(uint32_t cy) { // +1 cycle
#if ARCH_PIPELINE_RELOAD_CYCLES<2 #if ARCH_PIPELINE_RELOAD_CYCLES<2
#define EXTRA_NOP_CYCLES "nop" #define EXTRA_NOP_CYCLES "nop"
@ -96,10 +97,10 @@ FORCE_INLINE void __delay_4cycles(uint32_t cy) { // +1 cycle
); );
} }
Pio *SCK_pPio, *MOSI_pPio; Pio *SCK_pPio, *MOSI_pPio;
uint32_t SCK_dwMask, MOSI_dwMask; uint32_t SCK_dwMask, MOSI_dwMask;
static void spiSend_sw_DUE(uint8_t val) { // 800KHz static void spiSend_sw_DUE(uint8_t val) { // 800KHz
for (uint8_t i = 0; i < 8; i++) { for (uint8_t i = 0; i < 8; i++) {
if (val & 0x80) if (val & 0x80)
MOSI_pPio->PIO_SODR = MOSI_dwMask; MOSI_pPio->PIO_SODR = MOSI_dwMask;
@ -111,11 +112,11 @@ FORCE_INLINE void __delay_4cycles(uint32_t cy) { // +1 cycle
__delay_4cycles(22); __delay_4cycles(22);
SCK_pPio->PIO_CODR = SCK_dwMask; SCK_pPio->PIO_CODR = SCK_dwMask;
} }
} }
static uint8_t rs_last_state = 255; static uint8_t rs_last_state = 255;
static void u8g_com_DUE_st7920_write_byte_sw_spi(uint8_t rs, uint8_t val) { static void u8g_com_DUE_st7920_write_byte_sw_spi(uint8_t rs, uint8_t val) {
uint8_t i; uint8_t i;
if ( rs != rs_last_state) { // time to send a command/data byte if ( rs != rs_last_state) { // time to send a command/data byte
@ -134,10 +135,10 @@ FORCE_INLINE void __delay_4cycles(uint32_t cy) { // +1 cycle
spiSend_sw_DUE(val & 0x0f0); spiSend_sw_DUE(val & 0x0f0);
spiSend_sw_DUE(val << 4); spiSend_sw_DUE(val << 4);
} }
uint8_t u8g_com_HAL_DUE_ST7920_sw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr) { uint8_t u8g_com_HAL_DUE_ST7920_sw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr) {
switch (msg) { switch (msg) {
case U8G_COM_MSG_INIT: case U8G_COM_MSG_INIT:
SCK_pPio = g_APinDescription[u8g->pin_list[U8G_PI_SCK]].pPort; SCK_pPio = g_APinDescription[u8g->pin_list[U8G_PI_SCK]].pPort;
@ -196,7 +197,7 @@ FORCE_INLINE void __delay_4cycles(uint32_t cy) { // +1 cycle
break; break;
} }
return 1; return 1;
} }
#pragma GCC reset_options #pragma GCC reset_options