Several fixes to the backtracer. Tested ant it works
This commit is contained in:
etagle
parent
9a24c0ae3f
commit
328edea03a
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@ -34,19 +34,6 @@
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// Serial interrupt routines or any C runtime, as we don't know the
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// state we are when running them
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/* These symbols point to the start and end of stack */
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extern "C" const int _sstack;
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extern "C" const int _estack;
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/* These symbols point to the start and end of the code section */
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extern "C" const int _sfixed;
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extern "C" const int _efixed;
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/* These symbols point to the start and end of initialized data (could be SRAM functions!) */
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extern "C" const int _srelocate;
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extern "C" const int _erelocate;
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// A SW memory barrier, to ensure GCC does not overoptimize loops
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#define sw_barrier() asm volatile("": : :"memory");
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@ -126,25 +113,20 @@ static void TXDec(uint32_t v) {
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}
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/* Validate address */
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static bool validate_addr(uint16_t addr) {
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static bool validate_addr(uint32_t addr) {
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// PC must point into the text (CODE) area
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if (addr >= (uint32_t)&_sfixed && addr <= (uint32_t)&_efixed)
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// Address must be in SRAM (0x20070000 - 0x20088000)
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if (addr >= 0x20070000 && addr < 0x20088000)
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return true;
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// Or into the SRAM function area
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if (addr >= (uint32_t)&_srelocate && addr <= (uint32_t)&_erelocate)
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return true;
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// SP must point into the allocated stack area
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if (addr >= (uint32_t)&_sstack && addr <= (uint32_t)&_estack)
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// Or in FLASH (0x00080000 - 0x00100000)
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if (addr >= 0x00080000 && addr < 0x00100000)
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return true;
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return false;
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}
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static bool UnwReadW(const uint32_t a, uint32_t *v) {
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if (!validate_addr(a))
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return false;
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@ -153,7 +135,6 @@ static bool UnwReadW(const uint32_t a, uint32_t *v) {
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}
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static bool UnwReadH(const uint32_t a, uint16_t *v) {
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if (!validate_addr(a))
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return false;
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@ -162,7 +143,6 @@ static bool UnwReadH(const uint32_t a, uint16_t *v) {
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}
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static bool UnwReadB(const uint32_t a, uint8_t *v) {
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if (!validate_addr(a))
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return false;
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@ -173,13 +153,27 @@ static bool UnwReadB(const uint32_t a, uint8_t *v) {
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// Dump a backtrace entry
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static bool UnwReportOut(void* ctx, const UnwReport* bte) {
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int* p = (int*)ctx;
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TX(bte->name?bte->name:"unknown"); TX('@');TXHex(bte->function);
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(*p)++;
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TX('#'); TXDec(*p); TX(" : ");
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TX(bte->name?bte->name:"unknown"); TX('@'); TXHex(bte->function);
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TX('+'); TXDec(bte->address - bte->function);
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TX(" PC:");TXHex(bte->address); TX('\n');
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return true;
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}
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#if defined(UNW_DEBUG)
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void UnwPrintf(const char* format, ...) {
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char dest[256];
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va_list argptr;
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va_start(argptr, format);
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vsprintf(dest, format, argptr);
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va_end(argptr);
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TX(&dest[0]);
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}
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#endif
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/* Table of function pointers for passing to the unwinder */
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static const UnwindCallbacks UnwCallbacks = {
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UnwReportOut,
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@ -187,7 +181,7 @@ static const UnwindCallbacks UnwCallbacks = {
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UnwReadH,
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UnwReadB
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#if defined(UNW_DEBUG)
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,printf
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,UnwPrintf
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#endif
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};
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@ -201,24 +195,27 @@ static const UnwindCallbacks UnwCallbacks = {
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* The function ends with a BKPT instruction to force control back into the debugger
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*/
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extern "C"
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void HardFault_HandlerC(unsigned long *hardfault_args, unsigned long cause) {
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void HardFault_HandlerC(unsigned long *sp, unsigned long lr, unsigned long cause) {
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static const char* causestr[] = {
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"NMI","Hard","Mem","Bus","Usage","Debug","WDT","RSTC"
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};
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UnwindFrame btf;
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// Dump report to the Programming port (interrupts are DISABLED)
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TXBegin();
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TX("\n\n## Software Fault detected ##\n");
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TX("Cause: "); TX(causestr[cause]); TX('\n');
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TX("R0 : "); TXHex(((unsigned long)hardfault_args[0])); TX('\n');
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TX("R1 : "); TXHex(((unsigned long)hardfault_args[1])); TX('\n');
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TX("R2 : "); TXHex(((unsigned long)hardfault_args[2])); TX('\n');
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TX("R3 : "); TXHex(((unsigned long)hardfault_args[3])); TX('\n');
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TX("R12 : "); TXHex(((unsigned long)hardfault_args[4])); TX('\n');
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TX("LR : "); TXHex(((unsigned long)hardfault_args[5])); TX('\n');
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TX("PC : "); TXHex(((unsigned long)hardfault_args[6])); TX('\n');
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TX("PSR : "); TXHex(((unsigned long)hardfault_args[7])); TX('\n');
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TX("R0 : "); TXHex(((unsigned long)sp[0])); TX('\n');
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TX("R1 : "); TXHex(((unsigned long)sp[1])); TX('\n');
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TX("R2 : "); TXHex(((unsigned long)sp[2])); TX('\n');
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TX("R3 : "); TXHex(((unsigned long)sp[3])); TX('\n');
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TX("R12 : "); TXHex(((unsigned long)sp[4])); TX('\n');
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TX("LR : "); TXHex(((unsigned long)sp[5])); TX('\n');
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TX("PC : "); TXHex(((unsigned long)sp[6])); TX('\n');
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TX("PSR : "); TXHex(((unsigned long)sp[7])); TX('\n');
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// Configurable Fault Status Register
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// Consists of MMSR, BFSR and UFSR
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@ -241,14 +238,18 @@ void HardFault_HandlerC(unsigned long *hardfault_args, unsigned long cause) {
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// Bus Fault Address Register
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TX("BFAR : "); TXHex((*((volatile unsigned long *)(0xE000ED38)))); TX('\n');
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TX("ExcLR: "); TXHex(lr); TX('\n');
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TX("ExcSP: "); TXHex((unsigned long)sp); TX('\n');
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btf.sp = ((unsigned long)sp) + 8*4; // The original stack pointer
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btf.fp = btf.sp;
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btf.lr = ((unsigned long)sp[5]);
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btf.pc = ((unsigned long)sp[6]) | 1; // Force Thumb, as CORTEX only support it
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// Perform a backtrace
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TX("\nBacktrace:\n\n");
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UnwindFrame btf;
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btf.sp = ((unsigned long)hardfault_args[7]);
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btf.fp = btf.sp;
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btf.lr = ((unsigned long)hardfault_args[5]);
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btf.pc = ((unsigned long)hardfault_args[6]);
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UnwindStart(&btf, &UnwCallbacks, nullptr);
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int ctr = 0;
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UnwindStart(&btf, &UnwCallbacks, &ctr);
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// Disable all NVIC interrupts
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NVIC->ICER[0] = 0xFFFFFFFF;
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@ -274,7 +275,8 @@ __attribute__((naked)) void NMI_Handler(void) {
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" ite eq \n"
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" mrseq r0, msp \n"
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" mrsne r0, psp \n"
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" mov r1,#0 \n"
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" mov r1,lr \n"
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" mov r2,#0 \n"
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" b HardFault_HandlerC \n"
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);
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}
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@ -285,7 +287,8 @@ __attribute__((naked)) void HardFault_Handler(void) {
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" ite eq \n"
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" mrseq r0, msp \n"
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" mrsne r0, psp \n"
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" mov r1,#1 \n"
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" mov r1,lr \n"
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" mov r2,#1 \n"
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" b HardFault_HandlerC \n"
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);
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}
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@ -296,7 +299,8 @@ __attribute__((naked)) void MemManage_Handler(void) {
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" ite eq \n"
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" mrseq r0, msp \n"
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" mrsne r0, psp \n"
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" mov r1,#2 \n"
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" mov r1,lr \n"
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" mov r2,#2 \n"
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" b HardFault_HandlerC \n"
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);
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}
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@ -307,7 +311,8 @@ __attribute__((naked)) void BusFault_Handler(void) {
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" ite eq \n"
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" mrseq r0, msp \n"
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" mrsne r0, psp \n"
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" mov r1,#3 \n"
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" mov r1,lr \n"
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" mov r2,#3 \n"
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" b HardFault_HandlerC \n"
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);
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}
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@ -318,7 +323,8 @@ __attribute__((naked)) void UsageFault_Handler(void) {
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" ite eq \n"
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" mrseq r0, msp \n"
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" mrsne r0, psp \n"
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" mov r1,#4 \n"
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" mov r1,lr \n"
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" mov r2,#4 \n"
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" b HardFault_HandlerC \n"
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);
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}
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@ -329,18 +335,21 @@ __attribute__((naked)) void DebugMon_Handler(void) {
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" ite eq \n"
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" mrseq r0, msp \n"
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" mrsne r0, psp \n"
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" mov r1,#5 \n"
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" mov r1,lr \n"
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" mov r2,#5 \n"
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" b HardFault_HandlerC \n"
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);
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}
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/* This is NOT an exception, it is an interrupt handler - Nevertheless, the framing is the same */
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__attribute__((naked)) void WDT_Handler(void) {
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__asm volatile (
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" tst lr, #4 \n"
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" ite eq \n"
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" mrseq r0, msp \n"
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" mrsne r0, psp \n"
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" mov r1,#6 \n"
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" mov r1,lr \n"
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" mov r2,#6 \n"
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" b HardFault_HandlerC \n"
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);
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}
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@ -351,7 +360,8 @@ __attribute__((naked)) void RSTC_Handler(void) {
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" ite eq \n"
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" mrseq r0, msp \n"
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" mrsne r0, psp \n"
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" mov r1,#7 \n"
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" mov r1,lr \n"
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" mov r2,#7 \n"
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" b HardFault_HandlerC \n"
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);
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}
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@ -79,7 +79,7 @@ void UnwInitState(UnwState * const state, /**< Pointer to structure to fill.
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// Detect if function names are available
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static int __attribute__ ((noinline)) has_function_names(void) {
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uint32_t flag_word = ((uint32_t*)&has_function_names)[-1];
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uint32_t flag_word = ((uint32_t*)(((uint32_t)(&has_function_names)) & (-4))) [-1];
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return ((flag_word & 0xff000000) == 0xff000000) ? 1 : 0;
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}
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@ -93,7 +93,7 @@ bool UnwReportRetAddr(UnwState * const state, uint32_t addr) {
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// We found two acceptable values.
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entry.name = NULL;
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entry.address = addr;
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entry.address = addr & 0xFFFFFFFE; // Remove Thumb bit
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entry.function = 0;
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// If there are function names, try to solve name
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@ -108,7 +108,7 @@ bool UnwReportRetAddr(UnwState * const state, uint32_t addr) {
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uint32_t v;
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while(state->cb->readW(pf-4,&v)) {
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// Check if name descriptor is valid and name is terminated in 0.
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// Check if name descriptor is valid
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if ((v & 0xffffff00) == 0xff000000 &&
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(v & 0xff) > 1) {
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@ -38,6 +38,8 @@ UnwResult UnwStartThumb(UnwState * const state) {
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bool found = false;
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uint16_t t = UNW_MAX_INSTR_COUNT;
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uint32_t lastJumpAddr = 0; // Last JUMP address, to try to detect infinite loops
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bool loopDetected = false; // If a loop was detected
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do {
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uint16_t instr;
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@ -61,12 +63,332 @@ UnwResult UnwStartThumb(UnwState * const state) {
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return UNWIND_INCONSISTENT;
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}
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/*
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* Detect 32bit thumb instructions
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*/
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if ((instr & 0xe000) == 0xe000 && (instr & 0x1800) != 0) {
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uint16_t instr2;
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/* Check next address */
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state->regData[15].v += 2;
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/* Attempt to read the 2nd part of the instruction */
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if(!state->cb->readH(state->regData[15].v & (~0x1), &instr2)) {
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return UNWIND_IREAD_H_FAIL;
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}
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UnwPrintd3(" %x %04x:", state->regData[15].v, instr2);
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/*
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* Load/Store multiple: Only interpret
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* PUSH and POP
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*/
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if ((instr & 0xfe6f) == 0xe82d) {
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bool L = (instr & 0x10) ? true : false;
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uint16_t rList = instr2;
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if(L) {
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uint8_t r;
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/* Load from memory: POP */
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UnwPrintd1("POP {Rlist}\n");
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/* Load registers from stack */
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for(r = 0; r < 16; r++) {
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if(rList & (0x1 << r)) {
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/* Read the word */
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if(!UnwMemReadRegister(state, state->regData[13].v, &state->regData[r])) {
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return UNWIND_DREAD_W_FAIL;
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}
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/* Alter the origin to be from the stack if it was valid */
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if(M_IsOriginValid(state->regData[r].o)) {
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state->regData[r].o = REG_VAL_FROM_STACK;
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/* If restoring the PC */
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if (r == 15) {
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/* The bottom bit should have been set to indicate that
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* the caller was from Thumb. This would allow return
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* by BX for interworking APCS.
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*/
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if((state->regData[15].v & 0x1) == 0) {
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UnwPrintd2("Warning: Return address not to Thumb: 0x%08x\n", state->regData[15].v);
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/* Pop into the PC will not switch mode */
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return UNWIND_INCONSISTENT;
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}
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/* Store the return address */
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if(!UnwReportRetAddr(state, state->regData[15].v)) {
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return UNWIND_TRUNCATED;
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}
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/* Now have the return address */
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UnwPrintd2(" Return PC=%x\n", state->regData[15].v);
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/* Compensate for the auto-increment, which isn't needed here */
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state->regData[15].v -= 2;
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}
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} else {
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if (r == 15) {
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/* Return address is not valid */
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UnwPrintd1("PC popped with invalid address\n");
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return UNWIND_FAILURE;
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}
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}
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state->regData[13].v += 4;
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UnwPrintd3(" r%d = 0x%08x\n", r, state->regData[r].v);
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}
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}
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}
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else {
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int8_t r;
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/* Store to memory: PUSH */
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UnwPrintd1("PUSH {Rlist}");
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for(r = 15; r >= 0; r--) {
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if(rList & (0x1 << r)) {
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UnwPrintd4("\n r%d = 0x%08x\t; %s", r, state->regData[r].v, M_Origin2Str(state->regData[r].o));
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state->regData[13].v -= 4;
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if(!UnwMemWriteRegister(state, state->regData[13].v, &state->regData[r])) {
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return UNWIND_DWRITE_W_FAIL;
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}
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}
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}
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}
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}
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/*
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* PUSH register
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*/
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else if (instr == 0xf84d && (instr2 & 0x0fff) == 0x0d04) {
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uint8_t r = instr2 >> 12;
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/* Store to memory: PUSH */
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UnwPrintd2("PUSH {R%d}\n", r);
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UnwPrintd4("\n r%d = 0x%08x\t; %s", r, state->regData[r].v, M_Origin2Str(state->regData[r].o));
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state->regData[13].v -= 4;
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if(!UnwMemWriteRegister(state, state->regData[13].v, &state->regData[r])) {
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return UNWIND_DWRITE_W_FAIL;
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}
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}
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/*
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* POP register
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*/
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else if (instr == 0xf85d && (instr2 & 0x0fff) == 0x0b04) {
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uint8_t r = instr2 >> 12;
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/* Load from memory: POP */
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UnwPrintd2("POP {R%d}\n", r);
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/* Read the word */
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if(!UnwMemReadRegister(state, state->regData[13].v, &state->regData[r])) {
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return UNWIND_DREAD_W_FAIL;
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}
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/* Alter the origin to be from the stack if it was valid */
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if(M_IsOriginValid(state->regData[r].o)) {
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state->regData[r].o = REG_VAL_FROM_STACK;
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/* If restoring the PC */
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if (r == 15) {
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/* The bottom bit should have been set to indicate that
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* the caller was from Thumb. This would allow return
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* by BX for interworking APCS.
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*/
|
||||
if((state->regData[15].v & 0x1) == 0) {
|
||||
UnwPrintd2("Warning: Return address not to Thumb: 0x%08x\n", state->regData[15].v);
|
||||
|
||||
/* Pop into the PC will not switch mode */
|
||||
return UNWIND_INCONSISTENT;
|
||||
}
|
||||
|
||||
/* Store the return address */
|
||||
if(!UnwReportRetAddr(state, state->regData[15].v)) {
|
||||
return UNWIND_TRUNCATED;
|
||||
}
|
||||
|
||||
/* Now have the return address */
|
||||
UnwPrintd2(" Return PC=%x\n", state->regData[15].v);
|
||||
|
||||
/* Compensate for the auto-increment, which isn't needed here */
|
||||
state->regData[15].v -= 2;
|
||||
|
||||
}
|
||||
|
||||
} else {
|
||||
|
||||
if (r == 15) {
|
||||
/* Return address is not valid */
|
||||
UnwPrintd1("PC popped with invalid address\n");
|
||||
return UNWIND_FAILURE;
|
||||
}
|
||||
}
|
||||
|
||||
state->regData[13].v += 4;
|
||||
|
||||
UnwPrintd3(" r%d = 0x%08x\n", r, state->regData[r].v);
|
||||
}
|
||||
/*
|
||||
* Unconditional branch
|
||||
*/
|
||||
else if ((instr & 0xf800) == 0xf000 && (instr2 & 0xd000) == 0x9000) {
|
||||
uint32_t v;
|
||||
|
||||
uint8_t S = (instr & 0x400) >> 10;
|
||||
uint16_t imm10 = (instr & 0x3ff);
|
||||
uint8_t J1 = (instr2 & 0x2000) >> 13;
|
||||
uint8_t J2 = (instr2 & 0x0800) >> 11;
|
||||
uint16_t imm11 = (instr2 & 0x7ff);
|
||||
|
||||
uint8_t I1 = J1 ^ S ^ 1;
|
||||
uint8_t I2 = J2 ^ S ^ 1;
|
||||
uint32_t imm32 = (S << 24) | (I1 << 23) | (I2 << 22) |(imm10 << 12) | (imm11 << 1);
|
||||
if (S) imm32 |= 0xfe000000;
|
||||
|
||||
UnwPrintd2("B %d \n", imm32);
|
||||
|
||||
/* Update PC */
|
||||
state->regData[15].v += imm32;
|
||||
|
||||
/* Need to advance by a word to account for pre-fetch.
|
||||
* Advance by a half word here, allowing the normal address
|
||||
* advance to account for the other half word.
|
||||
*/
|
||||
state->regData[15].v += 2;
|
||||
|
||||
/* Compute the jump address */
|
||||
v = state->regData[15].v + 2;
|
||||
|
||||
/* Display PC of next instruction */
|
||||
UnwPrintd2(" New PC=%x", v);
|
||||
|
||||
/* Did we detect an infinite loop ? */
|
||||
loopDetected = lastJumpAddr == v;
|
||||
|
||||
/* Remember the last address we jumped to */
|
||||
lastJumpAddr = v;
|
||||
}
|
||||
|
||||
/*
|
||||
* Branch with link
|
||||
*/
|
||||
else if ((instr & 0xf800) == 0xf000 && (instr2 & 0xd000) == 0xd000) {
|
||||
|
||||
uint8_t S = (instr & 0x400) >> 10;
|
||||
uint16_t imm10 = (instr & 0x3ff);
|
||||
uint8_t J1 = (instr2 & 0x2000) >> 13;
|
||||
uint8_t J2 = (instr2 & 0x0800) >> 11;
|
||||
uint16_t imm11 = (instr2 & 0x7ff);
|
||||
|
||||
uint8_t I1 = J1 ^ S ^ 1;
|
||||
uint8_t I2 = J2 ^ S ^ 1;
|
||||
uint32_t imm32 = (S << 24) | (I1 << 23) | (I2 << 22) |(imm10 << 12) | (imm11 << 1);
|
||||
if (S) imm32 |= 0xfe000000;
|
||||
|
||||
UnwPrintd2("BL %d \n", imm32);
|
||||
|
||||
/* Never taken, as we are unwinding the stack */
|
||||
if (0) {
|
||||
|
||||
/* Store return address in LR register */
|
||||
state->regData[14].v = state->regData[15].v + 2;
|
||||
state->regData[14].o = REG_VAL_FROM_CONST;
|
||||
|
||||
/* Update PC */
|
||||
state->regData[15].v += imm32;
|
||||
|
||||
/* Need to advance by a word to account for pre-fetch.
|
||||
* Advance by a half word here, allowing the normal address
|
||||
* advance to account for the other half word.
|
||||
*/
|
||||
state->regData[15].v += 2;
|
||||
|
||||
/* Display PC of next instruction */
|
||||
UnwPrintd2(" Return PC=%x", state->regData[15].v);
|
||||
|
||||
/* Report the return address, including mode bit */
|
||||
if(!UnwReportRetAddr(state, state->regData[15].v)) {
|
||||
return UNWIND_TRUNCATED;
|
||||
}
|
||||
|
||||
/* Determine the new mode */
|
||||
if(state->regData[15].v & 0x1) {
|
||||
/* Branching to THUMB */
|
||||
|
||||
/* Account for the auto-increment which isn't needed */
|
||||
state->regData[15].v -= 2;
|
||||
}
|
||||
else {
|
||||
/* Branch to ARM */
|
||||
return UnwStartArm(state);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Conditional branches. Usually not taken, unless infinite loop is detected
|
||||
*/
|
||||
else if ((instr & 0xf800) == 0xf000 && (instr2 & 0xd000) == 0x8000) {
|
||||
|
||||
uint8_t S = (instr & 0x400) >> 10;
|
||||
uint16_t imm6 = (instr & 0x3f);
|
||||
uint8_t J1 = (instr2 & 0x2000) >> 13;
|
||||
uint8_t J2 = (instr2 & 0x0800) >> 11;
|
||||
uint16_t imm11 = (instr2 & 0x7ff);
|
||||
|
||||
uint8_t I1 = J1 ^ S ^ 1;
|
||||
uint8_t I2 = J2 ^ S ^ 1;
|
||||
uint32_t imm32 = (S << 20) | (I1 << 19) | (I2 << 18) |(imm6 << 12) | (imm11 << 1);
|
||||
if (S) imm32 |= 0xffe00000;
|
||||
|
||||
UnwPrintd2("Bcond %d\n", imm32);
|
||||
|
||||
/* Take the jump only if a loop is detected */
|
||||
if (loopDetected) {
|
||||
|
||||
/* Update PC */
|
||||
state->regData[15].v += imm32;
|
||||
|
||||
/* Need to advance by a word to account for pre-fetch.
|
||||
* Advance by a half word here, allowing the normal address
|
||||
* advance to account for the other half word.
|
||||
*/
|
||||
state->regData[15].v += 2;
|
||||
|
||||
/* Display PC of next instruction */
|
||||
UnwPrintd2(" New PC=%x", state->regData[15].v + 2);
|
||||
}
|
||||
}
|
||||
else {
|
||||
UnwPrintd1("???? (32)");
|
||||
|
||||
/* Unknown/undecoded. May alter some register, so invalidate file */
|
||||
UnwInvalidateRegisterFile(state->regData);
|
||||
}
|
||||
/* End of thumb 32bit code */
|
||||
|
||||
}
|
||||
/* Format 1: Move shifted register
|
||||
* LSL Rd, Rs, #Offset5
|
||||
* LSR Rd, Rs, #Offset5
|
||||
* ASR Rd, Rs, #Offset5
|
||||
*/
|
||||
if((instr & 0xe000) == 0x0000 && (instr & 0x1800) != 0x1800) {
|
||||
else if((instr & 0xe000) == 0x0000 && (instr & 0x1800) != 0x1800) {
|
||||
bool signExtend;
|
||||
uint8_t op = (instr & 0x1800) >> 11;
|
||||
uint8_t offset5 = (instr & 0x07c0) >> 6;
|
||||
|
|
@ -355,8 +677,8 @@ UnwResult UnwStartThumb(UnwState * const state) {
|
|||
}
|
||||
/* Format 5: Hi register operations/branch exchange
|
||||
* ADD Rd, Hs
|
||||
* ADD Hd, Rs
|
||||
* ADD Hd, Hs
|
||||
* CMP Hd, Rs
|
||||
* MOV Hd, Hs
|
||||
*/
|
||||
else if((instr & 0xfc00) == 0x4400) {
|
||||
uint8_t op = (instr & 0x0300) >> 8;
|
||||
|
|
@ -371,11 +693,6 @@ UnwResult UnwStartThumb(UnwState * const state) {
|
|||
if(h1)
|
||||
rhd += 8;
|
||||
|
||||
if(op != 3 && !h1 && !h2) {
|
||||
UnwPrintd1("\nError: h1 or h2 must be set for ADD, CMP or MOV\n");
|
||||
return UNWIND_ILLEGAL_INSTR;
|
||||
}
|
||||
|
||||
switch(op) {
|
||||
case 0: /* ADD */
|
||||
UnwPrintd5("ADD r%d, r%d\t; r%d %s", rhd, rhs, rhs, M_Origin2Str(state->regData[rhs].o));
|
||||
|
|
@ -407,6 +724,10 @@ UnwResult UnwStartThumb(UnwState * const state) {
|
|||
return UNWIND_TRUNCATED;
|
||||
}
|
||||
|
||||
/* Store return address in LR register */
|
||||
state->regData[14].v = state->regData[15].v + 2;
|
||||
state->regData[14].o = REG_VAL_FROM_CONST;
|
||||
|
||||
/* Update the PC */
|
||||
state->regData[15].v = state->regData[rhs].v;
|
||||
|
||||
|
|
@ -570,10 +891,42 @@ UnwResult UnwStartThumb(UnwState * const state) {
|
|||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Conditional branches
|
||||
* Bcond
|
||||
*/
|
||||
else if((instr & 0xf000) == 0xd000) {
|
||||
int32_t branchValue = (instr & 0xff);
|
||||
if (branchValue & 0x80) branchValue |= 0xffffff00;
|
||||
|
||||
/* Branch distance is twice that specified in the instruction. */
|
||||
branchValue *= 2;
|
||||
|
||||
UnwPrintd2("Bcond %d \n", branchValue);
|
||||
|
||||
/* Only take the branch if a loop was detected */
|
||||
if (loopDetected) {
|
||||
|
||||
/* Update PC */
|
||||
state->regData[15].v += branchValue;
|
||||
|
||||
/* Need to advance by a word to account for pre-fetch.
|
||||
* Advance by a half word here, allowing the normal address
|
||||
* advance to account for the other half word.
|
||||
*/
|
||||
state->regData[15].v += 2;
|
||||
|
||||
/* Display PC of next instruction */
|
||||
UnwPrintd2(" New PC=%x", state->regData[15].v + 2);
|
||||
}
|
||||
}
|
||||
|
||||
/* Format 18: unconditional branch
|
||||
* B label
|
||||
*/
|
||||
else if((instr & 0xf800) == 0xe000) {
|
||||
uint32_t v;
|
||||
int16_t branchValue = signExtend11(instr & 0x07ff);
|
||||
|
||||
/* Branch distance is twice that specified in the instruction. */
|
||||
|
|
@ -590,9 +943,17 @@ UnwResult UnwStartThumb(UnwState * const state) {
|
|||
*/
|
||||
state->regData[15].v += 2;
|
||||
|
||||
/* Display PC of next instruction */
|
||||
UnwPrintd2(" New PC=%x", state->regData[15].v + 2);
|
||||
/* Compute the jump address */
|
||||
v = state->regData[15].v + 2;
|
||||
|
||||
/* Display PC of next instruction */
|
||||
UnwPrintd2(" New PC=%x", v);
|
||||
|
||||
/* Did we detect an infinite loop ? */
|
||||
loopDetected = lastJumpAddr == v;
|
||||
|
||||
/* Remember the last address we jumped to */
|
||||
lastJumpAddr = v;
|
||||
}
|
||||
else {
|
||||
UnwPrintd1("????");
|
||||
|
|
|
|||
|
|
@ -22,55 +22,18 @@
|
|||
#include "unwarm.h"
|
||||
#include "unwarmbytab.h"
|
||||
|
||||
|
||||
/* These symbols point to the start and end of stack */
|
||||
extern const int _sstack;
|
||||
extern const int _estack;
|
||||
|
||||
/* These symbols point to the start and end of the code section */
|
||||
extern const int _sfixed;
|
||||
extern const int _efixed;
|
||||
|
||||
/* These symbols point to the start and end of initialized data (could be SRAM functions!) */
|
||||
extern const int _srelocate;
|
||||
extern const int _erelocate;
|
||||
|
||||
|
||||
/* Validate stack pointer (SP): It must be in the stack area */
|
||||
static inline __attribute__((always_inline)) UnwResult validate_sp(const void* sp) {
|
||||
|
||||
// SP must point into the allocated stack area
|
||||
if ((uint32_t)sp >= (uint32_t)&_sstack && (uint32_t)sp <= (uint32_t)&_estack)
|
||||
return UNWIND_SUCCESS;
|
||||
|
||||
return UNWIND_INVALID_SP;
|
||||
}
|
||||
|
||||
/* Validate code pointer (PC): It must be either in TEXT or in SRAM */
|
||||
static inline __attribute__((always_inline)) UnwResult validate_pc(const void* pc) {
|
||||
|
||||
// PC must point into the text (CODE) area
|
||||
if ((uint32_t)pc >= (uint32_t)&_sfixed && (uint32_t)pc <= (uint32_t)&_efixed)
|
||||
return UNWIND_SUCCESS;
|
||||
|
||||
// Or into the SRAM function area
|
||||
if ((uint32_t)pc >= (uint32_t)&_srelocate && (uint32_t)pc <= (uint32_t)&_erelocate)
|
||||
return UNWIND_SUCCESS;
|
||||
|
||||
return UNWIND_INVALID_PC;
|
||||
}
|
||||
|
||||
/* These symbols point to the unwind index and should be provide by the linker script */
|
||||
extern const UnwTabEntry __exidx_start[];
|
||||
extern const UnwTabEntry __exidx_end[];
|
||||
|
||||
// Detect if unwind information is present or not
|
||||
static int HasUnwindTableInfo(void) {
|
||||
return ((char*)(&__exidx_end) - (char*)(&__exidx_start)) > 16 ? 1 : 0; // 16 because there are default entries we can´t supress
|
||||
// > 16 because there are default entries we can´t supress
|
||||
return ((char*)(&__exidx_end) - (char*)(&__exidx_start)) > 16 ? 1 : 0;
|
||||
}
|
||||
|
||||
UnwResult UnwindStart(UnwindFrame* frame, const UnwindCallbacks *cb, void *data)
|
||||
{
|
||||
UnwResult UnwindStart(UnwindFrame* frame, const UnwindCallbacks *cb, void *data) {
|
||||
|
||||
if (HasUnwindTableInfo()) {
|
||||
|
||||
/* We have unwind information tables */
|
||||
|
|
|
|||
|
|
@ -149,7 +149,7 @@ typedef struct {
|
|||
|
||||
#if defined(UNW_DEBUG)
|
||||
/** Print a formatted line for debug. */
|
||||
int (*printf)(const char *format, ...);
|
||||
void (*printf)(const char *format, ...);
|
||||
#endif
|
||||
} UnwindCallbacks;
|
||||
|
||||
|
|
@ -169,6 +169,11 @@ extern "C" {
|
|||
* This will unwind the stack starting at the PC value supplied to in the
|
||||
* link register (i.e. not a normal register) and the stack pointer value
|
||||
* supplied.
|
||||
*
|
||||
* -If the program was compiled with -funwind-tables , it will use them to
|
||||
* perform the traceback. Otherwise, brute force will be employed
|
||||
* -If the program was compiled with -mpoke-function-name, then you will
|
||||
* get function names in the traceback. Otherwise, you will not.
|
||||
*/
|
||||
UnwResult UnwindStart(UnwindFrame* frame, const UnwindCallbacks *cb, void *data);
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue