Clear up some more compile warnings
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06fd4d7b28
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50270b53a0
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@ -217,7 +217,7 @@ extern "C" {
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#define udd_raise_msof() (UOTGHS->UOTGHS_DEVIFR = UOTGHS_DEVIFR_MSOFS)
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#define udd_raise_msof() (UOTGHS->UOTGHS_DEVIFR = UOTGHS_DEVIFR_MSOFS)
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#define Is_udd_msof() (Tst_bits(UOTGHS->UOTGHS_DEVISR, UOTGHS_DEVISR_MSOF))
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#define Is_udd_msof() (Tst_bits(UOTGHS->UOTGHS_DEVISR, UOTGHS_DEVISR_MSOF))
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#define udd_micro_frame_number() \
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#define udd_micro_frame_number() \
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(Rd_bitfield(UOTGHS->UOTGHS_DEVFNUM, (UOTGHS_DEVFNUM_FNUM_Msk|UOTGHS_DEVFNUM_MFNUM_Msk)))
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(Rd_bitfield(UOTGHS->UOTGHS_DEVFNUM, (UOTGHS_DEVFNUM_FNUM_Msk|UOTGHS_DEVFNUM_MFNUM_Msk)))
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//! @}
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//! @}
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//! Manage suspend event
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//! Manage suspend event
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@ -266,10 +266,10 @@ extern "C" {
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#define Is_udd_endpoint_enabled(ep) (Tst_bits(UOTGHS->UOTGHS_DEVEPT, UOTGHS_DEVEPT_EPEN0 << (ep)))
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#define Is_udd_endpoint_enabled(ep) (Tst_bits(UOTGHS->UOTGHS_DEVEPT, UOTGHS_DEVEPT_EPEN0 << (ep)))
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//! resets the selected endpoint
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//! resets the selected endpoint
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#define udd_reset_endpoint(ep) \
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#define udd_reset_endpoint(ep) \
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do { \
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do { \
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Set_bits(UOTGHS->UOTGHS_DEVEPT, UOTGHS_DEVEPT_EPRST0 << (ep)); \
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Set_bits(UOTGHS->UOTGHS_DEVEPT, UOTGHS_DEVEPT_EPRST0 << (ep)); \
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Clr_bits(UOTGHS->UOTGHS_DEVEPT, UOTGHS_DEVEPT_EPRST0 << (ep)); \
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Clr_bits(UOTGHS->UOTGHS_DEVEPT, UOTGHS_DEVEPT_EPRST0 << (ep)); \
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} while (0)
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} while (0)
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//! Tests if the selected endpoint is being reset
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//! Tests if the selected endpoint is being reset
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#define Is_udd_resetting_endpoint(ep) (Tst_bits(UOTGHS->UOTGHS_DEVEPT, UOTGHS_DEVEPT_EPRST0 << (ep)))
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#define Is_udd_resetting_endpoint(ep) (Tst_bits(UOTGHS->UOTGHS_DEVEPT, UOTGHS_DEVEPT_EPRST0 << (ep)))
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@ -290,6 +290,7 @@ extern "C" {
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//! Bounds given integer size to allowed range and rounds it up to the nearest
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//! Bounds given integer size to allowed range and rounds it up to the nearest
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//! available greater size, then applies register format of UOTGHS controller
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//! available greater size, then applies register format of UOTGHS controller
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//! for endpoint size bit-field.
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//! for endpoint size bit-field.
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#undef udd_format_endpoint_size
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#define udd_format_endpoint_size(size) (32 - clz(((uint32_t)MIN(MAX(size, 8), 1024) << 1) - 1) - 1 - 3)
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#define udd_format_endpoint_size(size) (32 - clz(((uint32_t)MIN(MAX(size, 8), 1024) << 1) - 1) - 1 - 3)
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//! Configures the selected endpoint size
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//! Configures the selected endpoint size
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#define udd_configure_endpoint_size(ep, size) (Wr_bitfield(UOTGHS_ARRAY(UOTGHS_DEVEPTCFG[0], ep), UOTGHS_DEVEPTCFG_EPSIZE_Msk, udd_format_endpoint_size(size)))
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#define udd_configure_endpoint_size(ep, size) (Wr_bitfield(UOTGHS_ARRAY(UOTGHS_DEVEPTCFG[0], ep), UOTGHS_DEVEPTCFG_EPSIZE_Msk, udd_format_endpoint_size(size)))
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@ -307,14 +308,14 @@ extern "C" {
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//! Configures selected endpoint in one step
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//! Configures selected endpoint in one step
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#define udd_configure_endpoint(ep, type, dir, size, bank) (\
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#define udd_configure_endpoint(ep, type, dir, size, bank) (\
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Wr_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTCFG[0], ep), UOTGHS_DEVEPTCFG_EPTYPE_Msk |\
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Wr_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTCFG[0], ep), UOTGHS_DEVEPTCFG_EPTYPE_Msk |\
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UOTGHS_DEVEPTCFG_EPDIR |\
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UOTGHS_DEVEPTCFG_EPDIR |\
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UOTGHS_DEVEPTCFG_EPSIZE_Msk |\
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UOTGHS_DEVEPTCFG_EPSIZE_Msk |\
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UOTGHS_DEVEPTCFG_EPBK_Msk , \
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UOTGHS_DEVEPTCFG_EPBK_Msk , \
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(((uint32_t)(type) << UOTGHS_DEVEPTCFG_EPTYPE_Pos) & UOTGHS_DEVEPTCFG_EPTYPE_Msk) |\
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(((uint32_t)(type) << UOTGHS_DEVEPTCFG_EPTYPE_Pos) & UOTGHS_DEVEPTCFG_EPTYPE_Msk) |\
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(((uint32_t)(dir ) << UOTGHS_DEVEPTCFG_EPDIR_Pos ) & UOTGHS_DEVEPTCFG_EPDIR) |\
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(((uint32_t)(dir ) << UOTGHS_DEVEPTCFG_EPDIR_Pos ) & UOTGHS_DEVEPTCFG_EPDIR) |\
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( (uint32_t)udd_format_endpoint_size(size) << UOTGHS_DEVEPTCFG_EPSIZE_Pos) |\
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( (uint32_t)udd_format_endpoint_size(size) << UOTGHS_DEVEPTCFG_EPSIZE_Pos) |\
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(((uint32_t)(bank) << UOTGHS_DEVEPTCFG_EPBK_Pos) & UOTGHS_DEVEPTCFG_EPBK_Msk))\
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(((uint32_t)(bank) << UOTGHS_DEVEPTCFG_EPBK_Pos) & UOTGHS_DEVEPTCFG_EPBK_Msk))\
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)
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)
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//! Tests if current endpoint is configured
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//! Tests if current endpoint is configured
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#define Is_udd_endpoint_configured(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTISR[0], ep), UOTGHS_DEVEPTISR_CFGOK))
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#define Is_udd_endpoint_configured(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTISR[0], ep), UOTGHS_DEVEPTISR_CFGOK))
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@ -540,7 +541,7 @@ extern "C" {
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//! @warning It is up to the user of this macro to make sure that used HSB
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//! @warning It is up to the user of this macro to make sure that used HSB
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//! addresses are identical to the DPRAM internal pointer modulo 32 bits.
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//! addresses are identical to the DPRAM internal pointer modulo 32 bits.
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#define udd_get_endpoint_fifo_access(ep, scale) \
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#define udd_get_endpoint_fifo_access(ep, scale) \
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(((volatile TPASTE2(U, scale) (*)[0x8000 / ((scale) / 8)])UOTGHS_RAM_ADDR)[(ep)])
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(((volatile TPASTE2(U, scale) (*)[0x8000 / ((scale) / 8)])UOTGHS_RAM_ADDR)[(ep)])
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//! @name UOTGHS endpoint DMA drivers
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//! @name UOTGHS endpoint DMA drivers
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//! These macros manage the common features of the endpoint DMA channels.
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//! These macros manage the common features of the endpoint DMA channels.
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@ -572,60 +573,60 @@ extern "C" {
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//! @{
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//! @{
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//! Structure for DMA next descriptor register
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//! Structure for DMA next descriptor register
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typedef struct {
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typedef struct {
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uint32_t *NXT_DSC_ADD;
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uint32_t *NXT_DSC_ADD;
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} uotghs_dma_nextdesc_t;
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} uotghs_dma_nextdesc_t;
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//! Structure for DMA control register
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//! Structure for DMA control register
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typedef struct {
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typedef struct {
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uint32_t CHANN_ENB:1,
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uint32_t CHANN_ENB:1,
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LDNXT_DSC:1,
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LDNXT_DSC:1,
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END_TR_EN:1,
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END_TR_EN:1,
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END_B_EN:1,
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END_B_EN:1,
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END_TR_IT:1,
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END_TR_IT:1,
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END_BUFFIT:1,
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END_BUFFIT:1,
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DESC_LD_IT:1,
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DESC_LD_IT:1,
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BUST_LCK:1,
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BUST_LCK:1,
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reserved:8,
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reserved:8,
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BUFF_LENGTH:16;
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BUFF_LENGTH:16;
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} uotghs_dma_control_t;
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} uotghs_dma_control_t;
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//! Structure for DMA status register
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//! Structure for DMA status register
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typedef struct {
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typedef struct {
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uint32_t CHANN_ENB:1,
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uint32_t CHANN_ENB:1,
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CHANN_ACT:1,
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CHANN_ACT:1,
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reserved0:2,
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reserved0:2,
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END_TR_ST:1,
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END_TR_ST:1,
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END_BF_ST:1,
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END_BF_ST:1,
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DESC_LDST:1,
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DESC_LDST:1,
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reserved1:9,
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reserved1:9,
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BUFF_COUNT:16;
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BUFF_COUNT:16;
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} uotghs_dma_status_t;
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} uotghs_dma_status_t;
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//! Structure for DMA descriptor
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//! Structure for DMA descriptor
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typedef struct {
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typedef struct {
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union {
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union {
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uint32_t nextdesc;
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uint32_t nextdesc;
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uotghs_dma_nextdesc_t NEXTDESC;
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uotghs_dma_nextdesc_t NEXTDESC;
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};
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};
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uint32_t addr;
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uint32_t addr;
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union {
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union {
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uint32_t control;
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uint32_t control;
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uotghs_dma_control_t CONTROL;
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uotghs_dma_control_t CONTROL;
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};
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};
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uint32_t reserved;
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uint32_t reserved;
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} sam_uotghs_dmadesc_t, uotghs_dmadesc_t;
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} sam_uotghs_dmadesc_t, uotghs_dmadesc_t;
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//! Structure for DMA registers in a channel
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//! Structure for DMA registers in a channel
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typedef struct {
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typedef struct {
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union {
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union {
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uint32_t nextdesc;
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uint32_t nextdesc;
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uotghs_dma_nextdesc_t NEXTDESC;
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uotghs_dma_nextdesc_t NEXTDESC;
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};
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};
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uint32_t addr;
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uint32_t addr;
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union {
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union {
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uint32_t control;
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uint32_t control;
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uotghs_dma_control_t CONTROL;
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uotghs_dma_control_t CONTROL;
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};
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};
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union {
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union {
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unsigned long status;
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unsigned long status;
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uotghs_dma_status_t STATUS;
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uotghs_dma_status_t STATUS;
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};
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};
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} sam_uotghs_dmach_t, uotghs_dmach_t;
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} sam_uotghs_dmach_t, uotghs_dmach_t;
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//! DMA channel control command
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//! DMA channel control command
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#define UDD_ENDPOINT_DMA_STOP_NOW (0)
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#define UDD_ENDPOINT_DMA_STOP_NOW (0)
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@ -70,7 +70,6 @@ static uint8_t SPI_speed = 0;
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static uint8_t rs_last_state = 255;
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static uint8_t rs_last_state = 255;
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static void u8g_com_LPC1768_st7920_write_byte_sw_spi(uint8_t rs, uint8_t val) {
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static void u8g_com_LPC1768_st7920_write_byte_sw_spi(uint8_t rs, uint8_t val) {
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uint8_t i;
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if (rs != rs_last_state) { // time to send a command/data byte
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if (rs != rs_last_state) { // time to send a command/data byte
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rs_last_state = rs;
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rs_last_state = rs;
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@ -443,7 +443,7 @@
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uint16_t segments = lroundf(cartesian_xy_mm * (1.0 / (DELTA_SEGMENT_MIN_LENGTH))); // cartesian fixed segment length
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uint16_t segments = lroundf(cartesian_xy_mm * (1.0 / (DELTA_SEGMENT_MIN_LENGTH))); // cartesian fixed segment length
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#endif
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#endif
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NOLESS(segments, 1); // must have at least one segment
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NOLESS(segments, 1U); // must have at least one segment
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const float inv_segments = 1.0 / segments; // divide once, multiply thereafter
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const float inv_segments = 1.0 / segments; // divide once, multiply thereafter
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#if IS_SCARA // scale the feed rate from mm/s to degrees/s
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#if IS_SCARA // scale the feed rate from mm/s to degrees/s
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@ -37,7 +37,7 @@ void GcodeSuite::M300() {
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uint16_t duration = parser.ushortval('P', 1000);
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uint16_t duration = parser.ushortval('P', 1000);
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// Limits the tone duration to 0-5 seconds.
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// Limits the tone duration to 0-5 seconds.
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NOMORE(duration, 5000);
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NOMORE(duration, 5000U);
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BUZZ(duration, frequency);
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BUZZ(duration, frequency);
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}
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}
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@ -570,7 +570,7 @@ float soft_endstop_min[XYZ] = { X_MIN_BED, Y_MIN_BED, Z_MIN_POS },
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#endif
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#endif
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// At least one segment is required
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// At least one segment is required
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NOLESS(segments, 1);
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NOLESS(segments, 1U);
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// The approximate length of each segment
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// The approximate length of each segment
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const float inv_segments = 1.0 / float(segments),
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const float inv_segments = 1.0 / float(segments),
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@ -717,7 +717,7 @@ float soft_endstop_min[XYZ] = { X_MIN_BED, Y_MIN_BED, Z_MIN_POS },
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// The length divided by the segment size
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// The length divided by the segment size
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// At least one segment is required
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// At least one segment is required
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uint16_t segments = cartesian_mm / segment_size;
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uint16_t segments = cartesian_mm / segment_size;
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NOLESS(segments, 1);
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NOLESS(segments, 1U);
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// The approximate length of each segment
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// The approximate length of each segment
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const float inv_segments = 1.0 / float(segments),
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const float inv_segments = 1.0 / float(segments),
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