✨ MSC Support for STM32 + SDIO boards -> SKR 2 (#22354)
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@ -28,68 +28,38 @@
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#include <stdint.h>
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#include <stdbool.h>
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#if NONE(STM32F103xE, STM32F103xG, STM32F4xx, STM32F7xx)
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#error "ERROR - Only STM32F103xE, STM32F103xG, STM32F4xx or STM32F7xx CPUs supported"
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#endif
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#if HAS_SD_HOST_DRIVE
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// use USB drivers
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extern "C" {
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int8_t SD_MSC_Read(uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len);
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int8_t SD_MSC_Write(uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len);
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extern SD_HandleTypeDef hsd;
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}
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bool SDIO_Init() {
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return hsd.State == HAL_SD_STATE_READY; // return pass/fail status
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}
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bool SDIO_ReadBlock(uint32_t block, uint8_t *src) {
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int8_t status = SD_MSC_Read(0, (uint8_t*)src, block, 1); // read one 512 byte block
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return (bool) status;
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}
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bool SDIO_WriteBlock(uint32_t block, const uint8_t *src) {
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int8_t status = SD_MSC_Write(0, (uint8_t*)src, block, 1); // write one 512 byte block
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return (bool) status;
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}
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#else // !USBD_USE_CDC_COMPOSITE
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// use local drivers
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#if defined(STM32F103xE) || defined(STM32F103xG)
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// use local drivers
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#if defined(STM32F103xE) || defined(STM32F103xG)
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#include <stm32f1xx_hal_rcc_ex.h>
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#include <stm32f1xx_hal_sd.h>
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#elif defined(STM32F4xx)
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#elif defined(STM32F4xx)
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#include <stm32f4xx_hal_rcc.h>
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#include <stm32f4xx_hal_dma.h>
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#include <stm32f4xx_hal_gpio.h>
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#include <stm32f4xx_hal_sd.h>
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#elif defined(STM32F7xx)
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#elif defined(STM32F7xx)
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#include <stm32f7xx_hal_rcc.h>
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#include <stm32f7xx_hal_dma.h>
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#include <stm32f7xx_hal_gpio.h>
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#include <stm32f7xx_hal_sd.h>
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#else
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#error "ERROR - Only STM32F103xE, STM32F103xG, STM32F4xx or STM32F7xx CPUs supported"
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#endif
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#else
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#error "SDIO only supported with STM32F103xE, STM32F103xG, STM32F4xx, or STM32F7xx."
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#endif
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// Fixed
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#define SDIO_D0_PIN PC8
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#define SDIO_D1_PIN PC9
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#define SDIO_D2_PIN PC10
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#define SDIO_D3_PIN PC11
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#define SDIO_CK_PIN PC12
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#define SDIO_CMD_PIN PD2
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// Fixed
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#define SDIO_D0_PIN PC8
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#define SDIO_D1_PIN PC9
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#define SDIO_D2_PIN PC10
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#define SDIO_D3_PIN PC11
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#define SDIO_CK_PIN PC12
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#define SDIO_CMD_PIN PD2
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SD_HandleTypeDef hsd; // create SDIO structure
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// F4 supports one DMA for RX and another for TX, but Marlin will never
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// do read and write at same time, so we use the same DMA for both.
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DMA_HandleTypeDef hdma_sdio;
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SD_HandleTypeDef hsd; // create SDIO structure
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// F4 supports one DMA for RX and another for TX, but Marlin will never
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// do read and write at same time, so we use the same DMA for both.
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DMA_HandleTypeDef hdma_sdio;
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/*
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/*
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SDIO_INIT_CLK_DIV is 118
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SDIO clock frequency is 48MHz / (TRANSFER_CLOCK_DIV + 2)
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SDIO init clock frequency should not exceed 400KHz = 48MHz / (118 + 2)
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@ -100,26 +70,26 @@
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MKS Robin board seems to have stable SDIO with BusWide 1bit and ClockDiv 8 i.e. 4.8MHz SDIO clock frequency
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Additional testing is required as there are clearly some 4bit initialization problems
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*/
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*/
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#ifndef USBD_OK
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#ifndef USBD_OK
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#define USBD_OK 0
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#endif
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#endif
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// Target Clock, configurable. Default is 18MHz, from STM32F1
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#ifndef SDIO_CLOCK
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// Target Clock, configurable. Default is 18MHz, from STM32F1
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#ifndef SDIO_CLOCK
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#define SDIO_CLOCK 18000000 // 18 MHz
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#endif
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#endif
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// SDIO retries, configurable. Default is 3, from STM32F1
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#ifndef SDIO_READ_RETRIES
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// SDIO retries, configurable. Default is 3, from STM32F1
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#ifndef SDIO_READ_RETRIES
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#define SDIO_READ_RETRIES 3
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#endif
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#endif
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// SDIO Max Clock (naming from STM Manual, don't change)
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#define SDIOCLK 48000000
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// SDIO Max Clock (naming from STM Manual, don't change)
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#define SDIOCLK 48000000
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static uint32_t clock_to_divider(uint32_t clk) {
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static uint32_t clock_to_divider(uint32_t clk) {
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// limit the SDIO master clock to 8/3 of PCLK2. See STM32 Manuals
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// Also limited to no more than 48Mhz (SDIOCLK).
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const uint32_t pclk2 = HAL_RCC_GetPCLK2Freq();
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@ -129,9 +99,9 @@
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// and subtract by 2, because STM32 will add 2, as written in the manual:
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// SDIO_CK frequency = SDIOCLK / [CLKDIV + 2]
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return pclk2 / clk + (pclk2 % clk != 0) - 2;
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}
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}
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void go_to_transfer_speed() {
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void go_to_transfer_speed() {
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/* Default SDIO peripheral configuration for SD card initialization */
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hsd.Init.ClockEdge = hsd.Init.ClockEdge;
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hsd.Init.ClockBypass = hsd.Init.ClockBypass;
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@ -142,9 +112,9 @@
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/* Initialize SDIO peripheral interface with default configuration */
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SDIO_Init(hsd.Instance, hsd.Init);
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}
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}
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void SD_LowLevel_Init(void) {
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void SD_LowLevel_Init(void) {
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uint32_t tempreg;
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__HAL_RCC_GPIOC_CLK_ENABLE(); //enable GPIO clocks
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// Power up the SDIO
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SDIO_PowerState_ON(SDIO);
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hsd.Instance = SDIO;
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}
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}
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void HAL_SD_MspInit(SD_HandleTypeDef *hsd) { // application specific init
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void HAL_SD_MspInit(SD_HandleTypeDef *hsd) { // application specific init
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UNUSED(hsd); // Prevent unused argument(s) compilation warning
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__HAL_RCC_SDIO_CLK_ENABLE(); // turn on SDIO clock
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}
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}
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bool SDIO_Init() {
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bool SDIO_Init() {
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uint8_t retryCnt = SDIO_READ_RETRIES;
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bool status;
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@ -271,9 +241,9 @@
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#endif
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return true;
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}
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}
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static bool SDIO_ReadWriteBlock_DMA(uint32_t block, const uint8_t *src, uint8_t *dst) {
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static bool SDIO_ReadWriteBlock_DMA(uint32_t block, const uint8_t *src, uint8_t *dst) {
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if (HAL_SD_GetCardState(&hsd) != HAL_SD_CARD_TRANSFER) return false;
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TERN_(USE_WATCHDOG, HAL_watchdog_refresh());
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@ -316,31 +286,38 @@
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while (HAL_SD_GetCardState(&hsd) != HAL_SD_CARD_TRANSFER) if (ELAPSED(millis(), timeout)) return false;
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return true;
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}
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}
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bool SDIO_ReadBlock(uint32_t block, uint8_t *dst) {
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bool SDIO_ReadBlock(uint32_t block, uint8_t *dst) {
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uint8_t retries = SDIO_READ_RETRIES;
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while (retries--) if (SDIO_ReadWriteBlock_DMA(block, NULL, dst)) return true;
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return false;
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}
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}
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bool SDIO_WriteBlock(uint32_t block, const uint8_t *src) {
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bool SDIO_WriteBlock(uint32_t block, const uint8_t *src) {
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uint8_t retries = SDIO_READ_RETRIES;
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while (retries--) if (SDIO_ReadWriteBlock_DMA(block, src, NULL)) return true;
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return false;
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}
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}
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#if defined(STM32F1xx)
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bool SDIO_IsReady() {
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return hsd.State == HAL_SD_STATE_READY;
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}
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uint32_t SDIO_GetCardSize() {
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return (uint32_t)(hsd.SdCard.BlockNbr) * (hsd.SdCard.BlockSize);
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}
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#if defined(STM32F1xx)
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#define DMA_IRQ_HANDLER DMA2_Channel4_5_IRQHandler
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#elif defined(STM32F4xx)
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#elif defined(STM32F4xx)
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#define DMA_IRQ_HANDLER DMA2_Stream3_IRQHandler
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#else
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#else
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#error "Unknown STM32 architecture."
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#endif
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#endif
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extern "C" void SDIO_IRQHandler(void) { HAL_SD_IRQHandler(&hsd); }
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extern "C" void DMA_IRQ_HANDLER(void) { HAL_DMA_IRQHandler(&hdma_sdio); }
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extern "C" void SDIO_IRQHandler(void) { HAL_SD_IRQHandler(&hsd); }
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extern "C" void DMA_IRQ_HANDLER(void) { HAL_DMA_IRQHandler(&hdma_sdio); }
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#endif // !USBD_USE_CDC_COMPOSITE
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#endif // SDIO_SUPPORT
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#endif // ARDUINO_ARCH_STM32 && !STM32GENERIC && !MAPLE_STM32F1
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@ -19,10 +19,10 @@
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#if HAS_SD_HOST_DRIVE
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#include "../shared/Marduino.h"
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#include "msc_sd.h"
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#include "usbd_core.h"
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#include "../shared/Marduino.h"
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#include "../../sd/cardreader.h"
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#include <USB.h>
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@ -184,6 +184,10 @@ bool SDIO_WriteBlock(uint32_t blockAddress, const uint8_t *data) {
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inline uint32_t SDIO_GetCardState() { return SDIO_CmdSendStatus(SdCard.RelCardAdd << 16U) ? (SDIO_GetResponse(SDIO_RESP1) >> 9U) & 0x0FU : SDIO_CARD_ERROR; }
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// No F1 board with SDIO + MSC using Maple, that I aware of...
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bool SDIO_IsReady() { return true; }
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uint32_t SDIO_GetCardSize() { return 0; }
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// ------------------------
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// SD Commands and Responses
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// ------------------------
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#elif MB(BTT_E3_RRF)
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#include "stm32f4/pins_BTT_E3_RRF.h" // STM32F4 env:BIGTREE_E3_RRF
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#elif MB(BTT_SKR_V2_0_REV_A)
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#include "stm32f4/pins_BTT_SKR_V2_0_REV_A.h" // STM32F4 env:BIGTREE_SKR_2
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#include "stm32f4/pins_BTT_SKR_V2_0_REV_A.h" // STM32F4 env:BIGTREE_SKR_2 env:BIGTREE_SKR_2_USB
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#elif MB(BTT_SKR_V2_0_REV_B)
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#include "stm32f4/pins_BTT_SKR_V2_0_REV_B.h" // STM32F4 env:BIGTREE_SKR_2
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#include "stm32f4/pins_BTT_SKR_V2_0_REV_B.h" // STM32F4 env:BIGTREE_SKR_2 env:BIGTREE_SKR_2_USB
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#elif MB(BTT_OCTOPUS_V1_0)
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#include "stm32f4/pins_BTT_OCTOPUS_V1_0.h" // STM32F4 env:BIGTREE_OCTOPUS_V1 env:BIGTREE_OCTOPUS_V1_USB
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#elif MB(BTT_OCTOPUS_V1_1)
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@ -29,6 +29,8 @@
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bool SDIO_Init();
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bool SDIO_ReadBlock(uint32_t block, uint8_t *dst);
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bool SDIO_WriteBlock(uint32_t block, const uint8_t *src);
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bool SDIO_IsReady();
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uint32_t SDIO_GetCardSize();
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class DiskIODriver_SDIO : public DiskIODriver {
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public:
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bool readCSD(csd_t *csd) override { return false; }
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bool readStart(const uint32_t block) override { return false; }
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bool readData(uint8_t *dst) override { return false; }
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bool readStop() override { return false; }
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bool readStart(const uint32_t block) override { curBlock = block; return true; }
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bool readData(uint8_t *dst) override { return readBlock(curBlock++, dst); }
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bool readStop() override { curBlock = -1; return true; }
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bool writeStart(const uint32_t block, const uint32_t) override { return false; }
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bool writeData(const uint8_t *src) override { return false; }
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bool writeStop() override { return false; }
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bool writeStart(const uint32_t block, const uint32_t) override { curBlock = block; return true; }
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bool writeData(const uint8_t *src) override { return writeBlock(curBlock++, src); }
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bool writeStop() override { curBlock = -1; return true; }
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bool readBlock(uint32_t block, uint8_t *dst) override { return SDIO_ReadBlock(block, dst); }
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bool writeBlock(uint32_t block, const uint8_t *src) override { return SDIO_WriteBlock(block, src); }
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uint32_t cardSize() override { return 0; }
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uint32_t cardSize() override { return SDIO_GetCardSize(); }
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bool isReady() override { return true; }
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bool isReady() override { return SDIO_IsReady(); }
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void idle() override {}
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private:
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uint32_t curBlock;
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};
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@ -243,6 +243,16 @@ build_flags = ${stm_flash_drive.build_flags}
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-DUSE_USBHOST_HS -DUSE_USB_HS_IN_FS -DUSBD_IRQ_PRIO=5 -DUSBD_IRQ_SUBPRIO=6
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-DHSE_VALUE=8000000U -DHAL_SD_MODULE_ENABLED
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#
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# BigTreeTech SKR V2.0 (STM32F407VGT6 ARM Cortex-M4) with USB Media Share Support
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#
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[env:BIGTREE_SKR_2_USB]
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platform = ${common_stm32.platform}
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extends = env:BIGTREE_SKR_2
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platform_packages = ${stm_flash_drive.platform_packages}
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build_unflags = -DUSBD_USE_CDC
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build_flags = ${env:BIGTREE_SKR_2.build_flags} -DUSBD_USE_CDC_MSC
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#
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# BigTreeTech Octopus V1.0/1.1 (STM32F446ZET6 ARM Cortex-M4)
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#
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