Fix MKS MINI12864 on SKR 1.3 (#15836)

This commit is contained in:
Marvin Sinister 2019-11-08 02:39:08 +01:00 committed by Scott Lahteine
parent ed6bbe012b
commit 8d157a4520
2 changed files with 10 additions and 8 deletions

View file

@ -130,7 +130,7 @@ uint8_t swSpiTransfer_mode_3(uint8_t b, const uint8_t spi_speed, const pin_t sck
static uint8_t SPI_speed = 0; static uint8_t SPI_speed = 0;
static void u8g_sw_spi_HAL_LPC1768_shift_out(uint8_t dataPin, uint8_t clockPin, uint8_t val) { static void u8g_sw_spi_HAL_LPC1768_shift_out(uint8_t dataPin, uint8_t clockPin, uint8_t val) {
#if ENABLED(FYSETC_MINI_12864) #if EITHER(FYSETC_MINI_12864, MKS_MINI_12864)
swSpiTransfer_mode_3(val, SPI_speed, clockPin, -1, dataPin); swSpiTransfer_mode_3(val, SPI_speed, clockPin, -1, dataPin);
#else #else
swSpiTransfer_mode_0(val, SPI_speed, clockPin, -1, dataPin); swSpiTransfer_mode_0(val, SPI_speed, clockPin, -1, dataPin);
@ -158,7 +158,7 @@ uint8_t u8g_com_HAL_LPC1768_sw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val,
break; break;
case U8G_COM_MSG_CHIP_SELECT: case U8G_COM_MSG_CHIP_SELECT:
#if ENABLED(FYSETC_MINI_12864) // LCD SPI is running mode 3 while SD card is running mode 0 #if EITHER(FYSETC_MINI_12864, MKS_MINI_12864) // LCD SPI is running mode 3 while SD card is running mode 0
if (arg_val) { // SCK idle state needs to be set to the proper idle state before if (arg_val) { // SCK idle state needs to be set to the proper idle state before
// the next chip select goes active // the next chip select goes active
u8g_SetPILevel(u8g, U8G_PI_SCK, 1); // Set SCK to mode 3 idle state before CS goes active u8g_SetPILevel(u8g, U8G_PI_SCK, 1); // Set SCK to mode 3 idle state before CS goes active

View file

@ -228,7 +228,6 @@
#define DOGLCD_A0 P1_19 #define DOGLCD_A0 P1_19
#define DOGLCD_SCK P0_15 #define DOGLCD_SCK P0_15
#define DOGLCD_MOSI P0_18 #define DOGLCD_MOSI P0_18
#define FORCE_SOFT_SPI
#define LCD_BACKLIGHT_PIN -1 #define LCD_BACKLIGHT_PIN -1
@ -256,6 +255,9 @@
#if ENABLED(MKS_MINI_12864) #if ENABLED(MKS_MINI_12864)
#define DOGLCD_CS P1_21 #define DOGLCD_CS P1_21
#define DOGLCD_A0 P1_22 #define DOGLCD_A0 P1_22
#define DOGLCD_SCK P0_15
#define DOGLCD_MOSI P0_18
#define FORCE_SOFT_SPI
#endif #endif
#if ENABLED(ULTIPANEL) #if ENABLED(ULTIPANEL)