Scott Lahteine
parent
5bf02e39a9
commit
8f84ce72e1
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@ -33,157 +33,43 @@
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#include <stdint.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <stdbool.h>
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// use local drivers
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#if defined(STM32F103xE) || defined(STM32F103xG)
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#if defined(STM32F103xE) || defined(STM32F103xG)
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#include <stm32f1xx.h>
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#include <stm32f1xx_hal_rcc_ex.h>
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#include <stm32f1xx_hal_sd.h>
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#elif defined(STM32F4xx)
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#elif defined(STM32F4xx)
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#include <stm32f4xx.h>
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#include <stm32f4xx_hal_rcc.h>
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#include <stm32f4xx_hal_dma.h>
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#include <stm32f4xx_hal_gpio.h>
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#include <stm32f4xx_hal_sd.h>
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#elif defined(STM32F7xx)
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#elif defined(STM32F7xx)
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#include <stm32f7xx.h>
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#include <stm32f7xx_hal_rcc.h>
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#include <stm32f7xx_hal_dma.h>
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#include <stm32f7xx_hal_gpio.h>
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#include <stm32f7xx_hal_sd.h>
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#elif defined(STM32H7xx)
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#elif defined(STM32H7xx)
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#include <stm32h7xx.h>
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#define SDIO_FOR_STM32H7
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#include <stm32h7xx_hal_rcc.h>
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#include <stm32h7xx_hal_dma.h>
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#include <stm32h7xx_hal_gpio.h>
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#include <stm32h7xx_hal_sd.h>
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#else
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#else
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#error "SDIO only supported with STM32F103xE, STM32F103xG, STM32F4xx, STM32F7xx, or STM32H7xx."
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#error "SDIO is only supported with STM32F103xE, STM32F103xG, STM32F4xx, STM32F7xx, and STM32H7xx."
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#endif
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#endif
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// SDIO Max Clock (naming from STM Manual, don't change)
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#define SDIOCLK 48000000
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// Target Clock, configurable. Default is 18MHz, from STM32F1
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// Target Clock, configurable. Default is 18MHz, from STM32F1
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#ifndef SDIO_CLOCK
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#ifndef SDIO_CLOCK
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#define SDIO_CLOCK 18000000 // 18 MHz
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#define SDIO_CLOCK 18000000 // 18 MHz
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#endif
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#endif
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#define SD_TIMEOUT 1000 // ms
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SD_HandleTypeDef hsd; // SDIO structure
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// SDIO Max Clock (naming from STM Manual, don't change)
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#define SDIOCLK 48000000
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#if defined(STM32F1xx)
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DMA_HandleTypeDef hdma_sdio;
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extern "C" void DMA2_Channel4_5_IRQHandler(void) {
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HAL_DMA_IRQHandler(&hdma_sdio);
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}
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#elif defined(STM32F4xx)
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DMA_HandleTypeDef hdma_sdio_rx;
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DMA_HandleTypeDef hdma_sdio_tx;
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extern "C" void DMA2_Stream3_IRQHandler(void) {
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HAL_DMA_IRQHandler(&hdma_sdio_rx);
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}
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extern "C" void DMA2_Stream6_IRQHandler(void) {
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HAL_DMA_IRQHandler(&hdma_sdio_tx);
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}
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#elif defined(STM32H7xx)
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#define __HAL_RCC_SDIO_FORCE_RESET __HAL_RCC_SDMMC1_FORCE_RESET
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#define __HAL_RCC_SDIO_RELEASE_RESET __HAL_RCC_SDMMC1_RELEASE_RESET
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#define __HAL_RCC_SDIO_CLK_ENABLE __HAL_RCC_SDMMC1_CLK_ENABLE
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#define SDIO SDMMC1
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#define SDIO_IRQn SDMMC1_IRQn
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#define SDIO_IRQHandler SDMMC1_IRQHandler
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#define SDIO_CLOCK_EDGE_RISING SDMMC_CLOCK_EDGE_RISING
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#define SDIO_CLOCK_POWER_SAVE_DISABLE SDMMC_CLOCK_POWER_SAVE_DISABLE
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#define SDIO_BUS_WIDE_1B SDMMC_BUS_WIDE_1B
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#define SDIO_BUS_WIDE_4B SDMMC_BUS_WIDE_4B
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#define SDIO_HARDWARE_FLOW_CONTROL_DISABLE SDMMC_HARDWARE_FLOW_CONTROL_DISABLE
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#endif
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uint8_t waitingRxCplt = 0;
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uint8_t waitingTxCplt = 0;
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SD_HandleTypeDef hsd;
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extern "C" void SDIO_IRQHandler(void) {
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HAL_SD_IRQHandler(&hsd);
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}
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void HAL_SD_TxCpltCallback(SD_HandleTypeDef *hsdio) {
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waitingTxCplt = 0;
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}
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void HAL_SD_RxCpltCallback(SD_HandleTypeDef *hsdio) {
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waitingRxCplt = 0;
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}
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void HAL_SD_MspInit(SD_HandleTypeDef *hsd) {
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pinmap_pinout(PC_12, PinMap_SD);
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pinmap_pinout(PD_2, PinMap_SD);
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pinmap_pinout(PC_8, PinMap_SD);
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#if PINS_EXIST(SDIO_D1, SDIO_D2, SDIO_D3) // define D1-D3 only if have a four bit wide SDIO bus
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// D1-D3
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pinmap_pinout(PC_9, PinMap_SD);
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pinmap_pinout(PC_10, PinMap_SD);
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pinmap_pinout(PC_11, PinMap_SD);
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#endif
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__HAL_RCC_SDIO_CLK_ENABLE();
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HAL_NVIC_EnableIRQ(SDIO_IRQn);
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// DMA Config
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#if defined(STM32F1xx)
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__HAL_RCC_DMA2_CLK_ENABLE();
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HAL_NVIC_EnableIRQ(DMA2_Channel4_5_IRQn);
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hdma_sdio.Instance = DMA2_Channel4;
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hdma_sdio.Init.Direction = DMA_PERIPH_TO_MEMORY;
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hdma_sdio.Init.PeriphInc = DMA_PINC_DISABLE;
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hdma_sdio.Init.MemInc = DMA_MINC_ENABLE;
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hdma_sdio.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
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hdma_sdio.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
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hdma_sdio.Init.Mode = DMA_NORMAL;
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hdma_sdio.Init.Priority = DMA_PRIORITY_LOW;
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HAL_DMA_Init(&hdma_sdio);
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__HAL_LINKDMA(hsd, hdmarx ,hdma_sdio);
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__HAL_LINKDMA(hsd, hdmatx, hdma_sdio);
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#elif defined(STM32F4xx)
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__HAL_RCC_DMA2_CLK_ENABLE();
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HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn);
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HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);
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hdma_sdio_rx.Instance = DMA2_Stream3;
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hdma_sdio_rx.Init.Channel = DMA_CHANNEL_4;
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hdma_sdio_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
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hdma_sdio_rx.Init.PeriphInc = DMA_PINC_DISABLE;
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hdma_sdio_rx.Init.MemInc = DMA_MINC_ENABLE;
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hdma_sdio_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
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hdma_sdio_rx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
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hdma_sdio_rx.Init.Mode = DMA_PFCTRL;
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hdma_sdio_rx.Init.Priority = DMA_PRIORITY_LOW;
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hdma_sdio_rx.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
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hdma_sdio_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
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hdma_sdio_rx.Init.MemBurst = DMA_MBURST_INC4;
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hdma_sdio_rx.Init.PeriphBurst = DMA_PBURST_INC4;
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HAL_DMA_Init(&hdma_sdio_rx);
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__HAL_LINKDMA(hsd,hdmarx,hdma_sdio_rx);
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hdma_sdio_tx.Instance = DMA2_Stream6;
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hdma_sdio_tx.Init.Channel = DMA_CHANNEL_4;
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hdma_sdio_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
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hdma_sdio_tx.Init.PeriphInc = DMA_PINC_DISABLE;
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hdma_sdio_tx.Init.MemInc = DMA_MINC_ENABLE;
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hdma_sdio_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
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hdma_sdio_tx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
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hdma_sdio_tx.Init.Mode = DMA_PFCTRL;
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hdma_sdio_tx.Init.Priority = DMA_PRIORITY_LOW;
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hdma_sdio_tx.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
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hdma_sdio_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
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hdma_sdio_tx.Init.MemBurst = DMA_MBURST_INC4;
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hdma_sdio_tx.Init.PeriphBurst = DMA_PBURST_INC4;
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HAL_DMA_Init(&hdma_sdio_tx);
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__HAL_LINKDMA(hsd,hdmatx,hdma_sdio_tx);
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#endif
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}
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void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd) {
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#if !defined(STM32F1xx)
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__HAL_RCC_SDIO_FORCE_RESET();
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delay(10);
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__HAL_RCC_SDIO_RELEASE_RESET();
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delay(10);
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#endif
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}
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static uint32_t clock_to_divider(uint32_t clk) {
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static uint32_t clock_to_divider(uint32_t clk) {
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#if defined(STM32H7xx)
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#ifdef SDIO_FOR_STM32H7
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// SDMMC_CK frequency = sdmmc_ker_ck / [2 * CLKDIV].
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// SDMMC_CK frequency = sdmmc_ker_ck / [2 * CLKDIV].
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uint32_t sdmmc_clk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SDMMC);
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uint32_t sdmmc_clk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SDMMC);
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return sdmmc_clk / (2U * SDIO_CLOCK) + (sdmmc_clk % (2U * SDIO_CLOCK) != 0);
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return sdmmc_clk / (2U * SDIO_CLOCK) + (sdmmc_clk % (2U * SDIO_CLOCK) != 0);
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#else
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#else
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// limit the SDIO master clock to 8/3 of PCLK2. See STM32 Manuals
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// limit the SDIO master clock to 8/3 of PCLK2. See STM32 Manuals
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@ -198,62 +84,359 @@ static uint32_t clock_to_divider(uint32_t clk) {
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#endif
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#endif
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}
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}
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bool SDIO_Init() {
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// Start the SDIO clock
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HAL_StatusTypeDef sd_state = HAL_OK;
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void HAL_SD_MspInit(SD_HandleTypeDef *hsd) {
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if (hsd.Instance == SDIO)
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UNUSED(hsd);
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HAL_SD_DeInit(&hsd);
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#ifdef SDIO_FOR_STM32H7
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pinmap_pinout(PC_12, PinMap_SD);
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/* HAL SD initialization */
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pinmap_pinout(PD_2, PinMap_SD);
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hsd.Instance = SDIO;
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pinmap_pinout(PC_8, PinMap_SD);
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hsd.Init.ClockEdge = SDIO_CLOCK_EDGE_RISING;
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#if PINS_EXIST(SDIO_D1, SDIO_D2, SDIO_D3) // Define D1-D3 only for 4-bit wide SDIO bus
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hsd.Init.ClockPowerSave = SDIO_CLOCK_POWER_SAVE_DISABLE;
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pinmap_pinout(PC_9, PinMap_SD);
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hsd.Init.BusWide = SDIO_BUS_WIDE_1B;
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pinmap_pinout(PC_10, PinMap_SD);
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hsd.Init.HardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_DISABLE;
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pinmap_pinout(PC_11, PinMap_SD);
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hsd.Init.ClockDiv = clock_to_divider(SDIO_CLOCK);
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#endif
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sd_state = HAL_SD_Init(&hsd);
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__HAL_RCC_SDMMC1_CLK_ENABLE();
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HAL_NVIC_EnableIRQ(SDMMC1_IRQn);
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#if PINS_EXIST(SDIO_D1, SDIO_D2, SDIO_D3)
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#else
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if (sd_state == HAL_OK) {
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__HAL_RCC_SDIO_CLK_ENABLE();
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sd_state = HAL_SD_ConfigWideBusOperation(&hsd, SDIO_BUS_WIDE_4B);
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}
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#endif
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#endif
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return (sd_state == HAL_OK) ? true : false;
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}
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}
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bool SDIO_ReadBlock(uint32_t block, uint8_t *dst) {
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#ifdef SDIO_FOR_STM32H7
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uint32_t timeout = HAL_GetTick() + SD_TIMEOUT;
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while (HAL_SD_GetCardState(&hsd) != HAL_SD_CARD_TRANSFER) {
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#define SD_TIMEOUT 1000 // ms
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if (HAL_GetTick() >= timeout) return false;
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extern "C" void SDMMC1_IRQHandler(void) { HAL_SD_IRQHandler(&hsd); }
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uint8_t waitingRxCplt = 0, waitingTxCplt = 0;
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void HAL_SD_TxCpltCallback(SD_HandleTypeDef *hsdio) { waitingTxCplt = 0; }
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void HAL_SD_RxCpltCallback(SD_HandleTypeDef *hsdio) { waitingRxCplt = 0; }
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void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd) {
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__HAL_RCC_SDMMC1_FORCE_RESET(); delay(10);
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__HAL_RCC_SDMMC1_RELEASE_RESET(); delay(10);
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}
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}
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waitingRxCplt = 1;
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bool SDIO_Init() {
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if (HAL_SD_ReadBlocks_DMA(&hsd, (uint8_t *)dst, block, 1) != HAL_OK)
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HAL_StatusTypeDef sd_state = HAL_OK;
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if (hsd.Instance == SDMMC1) HAL_SD_DeInit(&hsd);
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// HAL SD initialization
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hsd.Instance = SDMMC1;
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hsd.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING;
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hsd.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE;
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hsd.Init.BusWide = SDMMC_BUS_WIDE_1B;
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hsd.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE;
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hsd.Init.ClockDiv = clock_to_divider(SDIO_CLOCK);
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sd_state = HAL_SD_Init(&hsd);
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#if PINS_EXIST(SDIO_D1, SDIO_D2, SDIO_D3)
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if (sd_state == HAL_OK)
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sd_state = HAL_SD_ConfigWideBusOperation(&hsd, SDMMC_BUS_WIDE_4B);
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#endif
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return (sd_state == HAL_OK);
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}
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#else // !SDIO_FOR_STM32H7
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#define SD_TIMEOUT 500 // ms
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// SDIO retries, configurable. Default is 3, from STM32F1
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#ifndef SDIO_READ_RETRIES
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#define SDIO_READ_RETRIES 3
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#endif
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// F4 supports one DMA for RX and another for TX, but Marlin will never
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// do read and write at same time, so we use the same DMA for both.
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DMA_HandleTypeDef hdma_sdio;
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#ifdef STM32F1xx
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#define DMA_IRQ_HANDLER DMA2_Channel4_5_IRQHandler
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#elif defined(STM32F4xx)
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#define DMA_IRQ_HANDLER DMA2_Stream3_IRQHandler
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#else
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#error "Unknown STM32 architecture."
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#endif
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extern "C" void SDIO_IRQHandler(void) { HAL_SD_IRQHandler(&hsd); }
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extern "C" void DMA_IRQ_HANDLER(void) { HAL_DMA_IRQHandler(&hdma_sdio); }
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/*
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SDIO_INIT_CLK_DIV is 118
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SDIO clock frequency is 48MHz / (TRANSFER_CLOCK_DIV + 2)
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SDIO init clock frequency should not exceed 400kHz = 48MHz / (118 + 2)
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Default TRANSFER_CLOCK_DIV is 2 (118 / 40)
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Default SDIO clock frequency is 48MHz / (2 + 2) = 12 MHz
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This might be too fast for stable SDIO operations
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MKS Robin SDIO seems stable with BusWide 1bit and ClockDiv 8 (i.e., 4.8MHz SDIO clock frequency)
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More testing is required as there are clearly some 4bit init problems.
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*/
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void go_to_transfer_speed() {
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/* Default SDIO peripheral configuration for SD card initialization */
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hsd.Init.ClockEdge = hsd.Init.ClockEdge;
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hsd.Init.ClockBypass = hsd.Init.ClockBypass;
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hsd.Init.ClockPowerSave = hsd.Init.ClockPowerSave;
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hsd.Init.BusWide = hsd.Init.BusWide;
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hsd.Init.HardwareFlowControl = hsd.Init.HardwareFlowControl;
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hsd.Init.ClockDiv = clock_to_divider(SDIO_CLOCK);
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/* Initialize SDIO peripheral interface with default configuration */
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SDIO_Init(hsd.Instance, hsd.Init);
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}
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void SD_LowLevel_Init() {
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uint32_t tempreg;
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// Enable GPIO clocks
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__HAL_RCC_GPIOC_CLK_ENABLE();
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__HAL_RCC_GPIOD_CLK_ENABLE();
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GPIO_InitTypeDef GPIO_InitStruct;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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||||||
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GPIO_InitStruct.Pull = 1; // GPIO_NOPULL
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||||||
|
|
||||||
|
#if DISABLED(STM32F1xx)
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF12_SDIO;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_8 | GPIO_PIN_12; // D0 & SCK
|
||||||
|
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
#if PINS_EXIST(SDIO_D1, SDIO_D2, SDIO_D3) // define D1-D3 only if have a four bit wide SDIO bus
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11; // D1-D3
|
||||||
|
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// Configure PD.02 CMD line
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_2;
|
||||||
|
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
// Setup DMA
|
||||||
|
#ifdef STM32F1xx
|
||||||
|
hdma_sdio.Init.Mode = DMA_NORMAL;
|
||||||
|
hdma_sdio.Instance = DMA2_Channel4;
|
||||||
|
HAL_NVIC_EnableIRQ(DMA2_Channel4_5_IRQn);
|
||||||
|
#elif defined(STM32F4xx)
|
||||||
|
hdma_sdio.Init.Mode = DMA_PFCTRL;
|
||||||
|
hdma_sdio.Instance = DMA2_Stream3;
|
||||||
|
hdma_sdio.Init.Channel = DMA_CHANNEL_4;
|
||||||
|
hdma_sdio.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
|
||||||
|
hdma_sdio.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
|
||||||
|
hdma_sdio.Init.MemBurst = DMA_MBURST_INC4;
|
||||||
|
hdma_sdio.Init.PeriphBurst = DMA_PBURST_INC4;
|
||||||
|
HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn);
|
||||||
|
#endif
|
||||||
|
HAL_NVIC_EnableIRQ(SDIO_IRQn);
|
||||||
|
hdma_sdio.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||||
|
hdma_sdio.Init.MemInc = DMA_MINC_ENABLE;
|
||||||
|
hdma_sdio.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
|
||||||
|
hdma_sdio.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
|
||||||
|
hdma_sdio.Init.Priority = DMA_PRIORITY_LOW;
|
||||||
|
__HAL_LINKDMA(&hsd, hdmarx, hdma_sdio);
|
||||||
|
__HAL_LINKDMA(&hsd, hdmatx, hdma_sdio);
|
||||||
|
|
||||||
|
#ifdef STM32F1xx
|
||||||
|
__HAL_RCC_SDIO_CLK_ENABLE();
|
||||||
|
__HAL_RCC_DMA2_CLK_ENABLE();
|
||||||
|
#else
|
||||||
|
__HAL_RCC_SDIO_FORCE_RESET(); delay(2);
|
||||||
|
__HAL_RCC_SDIO_RELEASE_RESET(); delay(2);
|
||||||
|
__HAL_RCC_SDIO_CLK_ENABLE();
|
||||||
|
|
||||||
|
__HAL_RCC_DMA2_FORCE_RESET(); delay(2);
|
||||||
|
__HAL_RCC_DMA2_RELEASE_RESET(); delay(2);
|
||||||
|
__HAL_RCC_DMA2_CLK_ENABLE();
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// Initialize the SDIO (with initial <400Khz Clock)
|
||||||
|
tempreg = 0 // Reset value
|
||||||
|
| SDIO_CLKCR_CLKEN // Clock enabled
|
||||||
|
| SDIO_INIT_CLK_DIV; // Clock Divider. Clock = 48000 / (118 + 2) = 400Khz
|
||||||
|
// Keep the rest at 0 => HW_Flow Disabled, Rising Clock Edge, Disable CLK ByPass, Bus Width = 0, Power save Disable
|
||||||
|
SDIO->CLKCR = tempreg;
|
||||||
|
|
||||||
|
// Power up the SDIO
|
||||||
|
SDIO_PowerState_ON(SDIO);
|
||||||
|
hsd.Instance = SDIO;
|
||||||
|
}
|
||||||
|
|
||||||
|
bool SDIO_Init() {
|
||||||
|
uint8_t retryCnt = SDIO_READ_RETRIES;
|
||||||
|
|
||||||
|
bool status;
|
||||||
|
hsd.Instance = SDIO;
|
||||||
|
hsd.State = HAL_SD_STATE_RESET;
|
||||||
|
|
||||||
|
SD_LowLevel_Init();
|
||||||
|
|
||||||
|
uint8_t retry_Cnt = retryCnt;
|
||||||
|
for (;;) {
|
||||||
|
hal.watchdog_refresh();
|
||||||
|
status = (bool) HAL_SD_Init(&hsd);
|
||||||
|
if (!status) break;
|
||||||
|
if (!--retry_Cnt) return false; // return failing status if retries are exhausted
|
||||||
|
}
|
||||||
|
|
||||||
|
go_to_transfer_speed();
|
||||||
|
|
||||||
|
#if PINS_EXIST(SDIO_D1, SDIO_D2, SDIO_D3) // go to 4 bit wide mode if pins are defined
|
||||||
|
retry_Cnt = retryCnt;
|
||||||
|
for (;;) {
|
||||||
|
hal.watchdog_refresh();
|
||||||
|
if (!HAL_SD_ConfigWideBusOperation(&hsd, SDIO_BUS_WIDE_4B)) break; // some cards are only 1 bit wide so a pass here is not required
|
||||||
|
if (!--retry_Cnt) break;
|
||||||
|
}
|
||||||
|
if (!retry_Cnt) { // wide bus failed, go back to one bit wide mode
|
||||||
|
hsd.State = (HAL_SD_StateTypeDef) 0; // HAL_SD_STATE_RESET
|
||||||
|
SD_LowLevel_Init();
|
||||||
|
retry_Cnt = retryCnt;
|
||||||
|
for (;;) {
|
||||||
|
hal.watchdog_refresh();
|
||||||
|
status = (bool) HAL_SD_Init(&hsd);
|
||||||
|
if (!status) break;
|
||||||
|
if (!--retry_Cnt) return false; // return failing status if retries are exhausted
|
||||||
|
}
|
||||||
|
go_to_transfer_speed();
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Read or Write a block
|
||||||
|
* @details Read or Write a block with SDIO
|
||||||
|
*
|
||||||
|
* @param block The block index
|
||||||
|
* @param src The data buffer source for a write
|
||||||
|
* @param dst The data buffer destination for a read
|
||||||
|
*
|
||||||
|
* @return true on success
|
||||||
|
*/
|
||||||
|
static bool SDIO_ReadWriteBlock_DMA(uint32_t block, const uint8_t *src, uint8_t *dst) {
|
||||||
|
if (HAL_SD_GetCardState(&hsd) != HAL_SD_CARD_TRANSFER) return false;
|
||||||
|
|
||||||
|
hal.watchdog_refresh();
|
||||||
|
|
||||||
|
HAL_StatusTypeDef ret;
|
||||||
|
if (src) {
|
||||||
|
hdma_sdio.Init.Direction = DMA_MEMORY_TO_PERIPH;
|
||||||
|
HAL_DMA_Init(&hdma_sdio);
|
||||||
|
ret = HAL_SD_WriteBlocks_DMA(&hsd, (uint8_t*)src, block, 1);
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
hdma_sdio.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||||
|
HAL_DMA_Init(&hdma_sdio);
|
||||||
|
ret = HAL_SD_ReadBlocks_DMA(&hsd, (uint8_t*)dst, block, 1);
|
||||||
|
}
|
||||||
|
|
||||||
|
if (ret != HAL_OK) {
|
||||||
|
HAL_DMA_Abort_IT(&hdma_sdio);
|
||||||
|
HAL_DMA_DeInit(&hdma_sdio);
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
millis_t timeout = millis() + SD_TIMEOUT;
|
||||||
|
// Wait the transfer
|
||||||
|
while (hsd.State != HAL_SD_STATE_READY) {
|
||||||
|
if (ELAPSED(millis(), timeout)) {
|
||||||
|
HAL_DMA_Abort_IT(&hdma_sdio);
|
||||||
|
HAL_DMA_DeInit(&hdma_sdio);
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
while (__HAL_DMA_GET_FLAG(&hdma_sdio, __HAL_DMA_GET_TC_FLAG_INDEX(&hdma_sdio)) != 0
|
||||||
|
|| __HAL_DMA_GET_FLAG(&hdma_sdio, __HAL_DMA_GET_TE_FLAG_INDEX(&hdma_sdio)) != 0) { /* nada */ }
|
||||||
|
|
||||||
|
HAL_DMA_Abort_IT(&hdma_sdio);
|
||||||
|
HAL_DMA_DeInit(&hdma_sdio);
|
||||||
|
|
||||||
|
timeout = millis() + SD_TIMEOUT;
|
||||||
|
while (HAL_SD_GetCardState(&hsd) != HAL_SD_CARD_TRANSFER) if (ELAPSED(millis(), timeout)) return false;
|
||||||
|
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif // !SDIO_FOR_STM32H7
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Read a block
|
||||||
|
* @details Read a block to media with SDIO
|
||||||
|
*
|
||||||
|
* @param block The block index
|
||||||
|
* @param src The block buffer
|
||||||
|
*
|
||||||
|
* @return true on success
|
||||||
|
*/
|
||||||
|
bool SDIO_ReadBlock(uint32_t block, uint8_t *dst) {
|
||||||
|
#ifdef SDIO_FOR_STM32H7
|
||||||
|
|
||||||
|
uint32_t timeout = HAL_GetTick() + SD_TIMEOUT;
|
||||||
|
|
||||||
|
while (HAL_SD_GetCardState(&hsd) != HAL_SD_CARD_TRANSFER)
|
||||||
|
if (HAL_GetTick() >= timeout) return false;
|
||||||
|
|
||||||
|
waitingRxCplt = 1;
|
||||||
|
if (HAL_SD_ReadBlocks_DMA(&hsd, (uint8_t*)dst, block, 1) != HAL_OK)
|
||||||
|
return false;
|
||||||
|
|
||||||
|
timeout = HAL_GetTick() + SD_TIMEOUT;
|
||||||
|
while (waitingRxCplt)
|
||||||
|
if (HAL_GetTick() >= timeout) return false;
|
||||||
|
|
||||||
|
return true;
|
||||||
|
|
||||||
|
#else
|
||||||
|
|
||||||
|
uint8_t retries = SDIO_READ_RETRIES;
|
||||||
|
while (retries--) if (SDIO_ReadWriteBlock_DMA(block, nullptr, dst)) return true;
|
||||||
return false;
|
return false;
|
||||||
|
|
||||||
timeout = HAL_GetTick() + SD_TIMEOUT;
|
#endif
|
||||||
while (waitingRxCplt)
|
|
||||||
if (HAL_GetTick() >= timeout) return false;
|
|
||||||
|
|
||||||
return true;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Write a block
|
||||||
|
* @details Write a block to media with SDIO
|
||||||
|
*
|
||||||
|
* @param block The block index
|
||||||
|
* @param src The block data
|
||||||
|
*
|
||||||
|
* @return true on success
|
||||||
|
*/
|
||||||
bool SDIO_WriteBlock(uint32_t block, const uint8_t *src) {
|
bool SDIO_WriteBlock(uint32_t block, const uint8_t *src) {
|
||||||
uint32_t timeout = HAL_GetTick() + SD_TIMEOUT;
|
#ifdef SDIO_FOR_STM32H7
|
||||||
|
|
||||||
while (HAL_SD_GetCardState(&hsd) != HAL_SD_CARD_TRANSFER)
|
uint32_t timeout = HAL_GetTick() + SD_TIMEOUT;
|
||||||
if (HAL_GetTick() >= timeout) return false;
|
|
||||||
|
|
||||||
waitingTxCplt = 1;
|
while (HAL_SD_GetCardState(&hsd) != HAL_SD_CARD_TRANSFER)
|
||||||
if (HAL_SD_WriteBlocks_DMA(&hsd, (uint8_t *)src, block, 1) != HAL_OK)
|
if (HAL_GetTick() >= timeout) return false;
|
||||||
|
|
||||||
|
waitingTxCplt = 1;
|
||||||
|
if (HAL_SD_WriteBlocks_DMA(&hsd, (uint8_t*)src, block, 1) != HAL_OK)
|
||||||
|
return false;
|
||||||
|
|
||||||
|
timeout = HAL_GetTick() + SD_TIMEOUT;
|
||||||
|
while (waitingTxCplt)
|
||||||
|
if (HAL_GetTick() >= timeout) return false;
|
||||||
|
|
||||||
|
return true;
|
||||||
|
|
||||||
|
#else
|
||||||
|
|
||||||
|
uint8_t retries = SDIO_READ_RETRIES;
|
||||||
|
while (retries--) if (SDIO_ReadWriteBlock_DMA(block, src, nullptr)) return true;
|
||||||
return false;
|
return false;
|
||||||
|
|
||||||
timeout = HAL_GetTick() + SD_TIMEOUT;
|
#endif
|
||||||
while (waitingTxCplt)
|
|
||||||
if (HAL_GetTick() >= timeout) return false;
|
|
||||||
|
|
||||||
return true;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
bool SDIO_IsReady() {
|
bool SDIO_IsReady() {
|
||||||
|
|
|
||||||
Loading…
Reference in a new issue