Various fixes for DUE... (#10152)
- Watchdog reset during SD Card initialization. - Move `DebugMonitor` to `DebugMonitor_Due.cpp`. - Since the watchdog is enabled on boot do extra resets during init. - Have `thermalManager` do watchdog reset before its ISR starts to prevent reset. - Ensure that timers are stopped before reprogramming them to address tone issues. - Improve SAM3XE reset when reflashed through the native port.
This commit is contained in:
Eduardo José Tagle
Scott Lahteine
parent
c3c264978f
commit
97e8a6ebd9
238
Marlin/src/HAL/HAL_DUE/DebugMonitor_Due.cpp
Normal file
238
Marlin/src/HAL/HAL_DUE/DebugMonitor_Due.cpp
Normal file
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@ -0,0 +1,238 @@
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/**
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* Marlin 3D Printer Firmware
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* Copyright (C) 2016 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
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*
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* Based on Sprinter and grbl.
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* Copyright (C) 2011 Camiel Gubbels / Erik van der Zalm
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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#ifdef ARDUINO_ARCH_SAM
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#include "../../inc/MarlinConfig.h"
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#include "../../Marlin.h"
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// Debug monitor that dumps to the Programming port all status when
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// an exception or WDT timeout happens - And then resets the board
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// All the Monitor routines must run with interrupts disabled and
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// under an ISR execution context. That is why we cannot reuse the
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// Serial interrupt routines or any C runtime, as we don't know the
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// state we are when running them
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// A SW memory barrier, to ensure GCC does not overoptimize loops
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#define sw_barrier() asm volatile("": : :"memory");
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// (re)initialize UART0 as a monitor output to 250000,n,8,1
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static void TXBegin(void) {
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// Disable UART interrupt in NVIC
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NVIC_DisableIRQ( UART_IRQn );
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// Disable clock
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pmc_disable_periph_clk( ID_UART );
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// Configure PMC
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pmc_enable_periph_clk( ID_UART );
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// Disable PDC channel
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UART->UART_PTCR = UART_PTCR_RXTDIS | UART_PTCR_TXTDIS;
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// Reset and disable receiver and transmitter
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UART->UART_CR = UART_CR_RSTRX | UART_CR_RSTTX | UART_CR_RXDIS | UART_CR_TXDIS;
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// Configure mode: 8bit, No parity, 1 bit stop
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UART->UART_MR = UART_MR_CHMODE_NORMAL | US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_NO;
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// Configure baudrate (asynchronous, no oversampling) to 250000 bauds
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UART->UART_BRGR = (SystemCoreClock / (250000 << 4));
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// Enable receiver and transmitter
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UART->UART_CR = UART_CR_RXEN | UART_CR_TXEN;
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}
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// Send character through UART with no interrupts
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static void TX(char c) {
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while (!(UART->UART_SR & UART_SR_TXRDY)) { WDT_Restart(WDT); sw_barrier(); };
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UART->UART_THR = c;
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}
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// Send String through UART
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static void TX(const char* s) {
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while (*s) {
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TX(*s++);
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}
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}
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static void TXDigit(uint32_t d) {
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if (d < 10) TX((char)(d+'0'));
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else if (d < 16) TX((char)(d+'A'-10));
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else TX('?');
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}
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// Send Hex number thru UART
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static void TXHex(uint32_t v) {
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TX("0x");
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for (int i=0; i<8; i++, v <<= 4) {
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TXDigit((v >> 28) & 0xF);
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}
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}
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/**
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* HardFaultHandler_C:
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* This is called from the HardFault_HandlerAsm with a pointer the Fault stack
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* as the parameter. We can then read the values from the stack and place them
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* into local variables for ease of reading.
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* We then read the various Fault Status and Address Registers to help decode
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* cause of the fault.
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* The function ends with a BKPT instruction to force control back into the debugger
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*/
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extern "C"
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void HardFault_HandlerC(unsigned long *hardfault_args, unsigned long cause) {
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static const char* causestr[] = {
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"NMI","Hard","Mem","Bus","Usage","Debug","WDT","RSTC"
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};
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// Dump report to the Programming port (interrupts are DISABLED)
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TXBegin();
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TX("\n\n## Software Fault detected ##\n");
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TX("Cause: "); TX(causestr[cause]); TX('\n');
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TX("R0 : "); TXHex(((unsigned long)hardfault_args[0])); TX('\n');
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TX("R1 : "); TXHex(((unsigned long)hardfault_args[1])); TX('\n');
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TX("R2 : "); TXHex(((unsigned long)hardfault_args[2])); TX('\n');
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TX("R3 : "); TXHex(((unsigned long)hardfault_args[3])); TX('\n');
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TX("R12 : "); TXHex(((unsigned long)hardfault_args[4])); TX('\n');
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TX("LR : "); TXHex(((unsigned long)hardfault_args[5])); TX('\n');
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TX("PC : "); TXHex(((unsigned long)hardfault_args[6])); TX('\n');
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TX("PSR : "); TXHex(((unsigned long)hardfault_args[7])); TX('\n');
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// Configurable Fault Status Register
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// Consists of MMSR, BFSR and UFSR
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TX("CFSR : "); TXHex((*((volatile unsigned long *)(0xE000ED28)))); TX('\n');
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// Hard Fault Status Register
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TX("HFSR : "); TXHex((*((volatile unsigned long *)(0xE000ED2C)))); TX('\n');
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// Debug Fault Status Register
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TX("DFSR : "); TXHex((*((volatile unsigned long *)(0xE000ED30)))); TX('\n');
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// Auxiliary Fault Status Register
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TX("AFSR : "); TXHex((*((volatile unsigned long *)(0xE000ED3C)))); TX('\n');
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// Read the Fault Address Registers. These may not contain valid values.
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// Check BFARVALID/MMARVALID to see if they are valid values
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// MemManage Fault Address Register
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TX("MMAR : "); TXHex((*((volatile unsigned long *)(0xE000ED34)))); TX('\n');
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// Bus Fault Address Register
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TX("BFAR : "); TXHex((*((volatile unsigned long *)(0xE000ED38)))); TX('\n');
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// Reset controller
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NVIC_SystemReset();
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while(1) { WDT_Restart(WDT); }
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}
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__attribute__((naked)) void NMI_Handler(void) {
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__asm volatile (
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" tst lr, #4 \n"
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" ite eq \n"
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" mrseq r0, msp \n"
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" mrsne r0, psp \n"
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" mov r1,#0 \n"
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" b HardFault_HandlerC \n"
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);
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}
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__attribute__((naked)) void HardFault_Handler(void) {
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__asm volatile (
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" tst lr, #4 \n"
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" ite eq \n"
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" mrseq r0, msp \n"
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" mrsne r0, psp \n"
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" mov r1,#1 \n"
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" b HardFault_HandlerC \n"
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);
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}
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__attribute__((naked)) void MemManage_Handler(void) {
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__asm volatile (
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" tst lr, #4 \n"
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" ite eq \n"
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" mrseq r0, msp \n"
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" mrsne r0, psp \n"
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" mov r1,#2 \n"
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" b HardFault_HandlerC \n"
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);
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}
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__attribute__((naked)) void BusFault_Handler(void) {
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__asm volatile (
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" tst lr, #4 \n"
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" ite eq \n"
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" mrseq r0, msp \n"
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" mrsne r0, psp \n"
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" mov r1,#3 \n"
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" b HardFault_HandlerC \n"
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);
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}
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__attribute__((naked)) void UsageFault_Handler(void) {
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__asm volatile (
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" tst lr, #4 \n"
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" ite eq \n"
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" mrseq r0, msp \n"
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" mrsne r0, psp \n"
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" mov r1,#4 \n"
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" b HardFault_HandlerC \n"
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);
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}
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__attribute__((naked)) void DebugMon_Handler(void) {
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__asm volatile (
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" tst lr, #4 \n"
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" ite eq \n"
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" mrseq r0, msp \n"
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" mrsne r0, psp \n"
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" mov r1,#5 \n"
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" b HardFault_HandlerC \n"
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);
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}
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__attribute__((naked)) void WDT_Handler(void) {
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__asm volatile (
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" tst lr, #4 \n"
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" ite eq \n"
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" mrseq r0, msp \n"
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" mrsne r0, psp \n"
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" mov r1,#6 \n"
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" b HardFault_HandlerC \n"
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);
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}
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__attribute__((naked)) void RSTC_Handler(void) {
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__asm volatile (
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" tst lr, #4 \n"
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" ite eq \n"
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" mrseq r0, msp \n"
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" mrsne r0, psp \n"
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" mov r1,#7 \n"
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" b HardFault_HandlerC \n"
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);
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}
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#endif
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@ -34,6 +34,7 @@
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#include "../HAL.h"
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#include <Wire.h>
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#include "usb/usb_task.h"
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// --------------------------------------------------------------------------
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// Externals
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@ -73,6 +74,18 @@ uint16_t HAL_adc_result;
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// Public functions
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// --------------------------------------------------------------------------
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// HAL initialization task
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void HAL_init(void) {
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// Initialize the USB stack
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usb_task_init();
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}
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// HAL idle task
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void HAL_idletask(void) {
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// Perform USB stack housekeeping
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usb_task_idle();
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}
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// disable interrupts
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void cli(void) { noInterrupts(); }
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@ -82,14 +95,13 @@ void sei(void) { interrupts(); }
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void HAL_clear_reset_source(void) { }
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uint8_t HAL_get_reset_source(void) {
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switch ((RSTC->RSTC_SR >> 8) & 7) {
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case 0: return RST_POWER_ON; break;
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case 1: return RST_BACKUP; break;
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case 2: return RST_WATCHDOG; break;
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case 3: return RST_SOFTWARE; break;
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case 4: return RST_EXTERNAL; break;
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default:
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return 0;
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switch ((RSTC->RSTC_SR >> 8) & 0x07) {
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case 0: return RST_POWER_ON;
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case 1: return RST_BACKUP;
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case 2: return RST_WATCHDOG;
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case 3: return RST_SOFTWARE;
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case 4: return RST_EXTERNAL;
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default: return 0;
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}
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}
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@ -160,14 +160,15 @@ void toneInit();
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void tone(const pin_t _pin, const unsigned int frequency, const unsigned long duration=0);
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void noTone(const pin_t _pin);
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// Enable hooks into idle and setup for USB stack
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// Enable hooks into idle and setup for HAL
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#define HAL_IDLETASK 1
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#define HAL_INIT 1
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void HAL_idletask(void);
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void HAL_init(void);
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#ifdef __cplusplus
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extern "C" {
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#endif
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void HAL_idletask(void);
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void HAL_init(void);
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char *dtostrf (double __val, signed char __width, unsigned char __prec, char *__s);
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#ifdef __cplusplus
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}
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@ -96,6 +96,15 @@ void HAL_timer_start(const uint8_t timer_num, const uint32_t frequency) {
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IRQn_Type irq = TimerConfig[timer_num].IRQ_Id;
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uint32_t channel = TimerConfig[timer_num].channel;
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// Disable interrupt, just in case it was already enabled
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NVIC_DisableIRQ(irq);
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// Disable timer interrupt
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tc->TC_CHANNEL[channel].TC_IDR = TC_IDR_CPCS;
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// Stop timer, just in case, to be able to reconfigure it
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TC_Stop(tc, channel);
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pmc_set_writeprotect(false);
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pmc_enable_periph_clk((uint32_t)irq);
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NVIC_SetPriority(irq, TimerConfig [timer_num].priority);
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@ -103,12 +112,16 @@ void HAL_timer_start(const uint8_t timer_num, const uint32_t frequency) {
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// wave mode, reset counter on match with RC,
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TC_Configure(tc, channel, TC_CMR_WAVE | TC_CMR_WAVSEL_UP_RC | TC_CMR_TCCLKS_TIMER_CLOCK1);
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// Set compare value
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TC_SetRC(tc, channel, VARIANT_MCK / 2 / frequency);
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// And start timer
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TC_Start(tc, channel);
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// enable interrupt on RC compare
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tc->TC_CHANNEL[channel].TC_IER = TC_IER_CPCS;
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// Finally, enable IRQ
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NVIC_EnableIRQ(irq);
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}
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|
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@ -109,23 +109,12 @@ FORCE_INLINE static hal_timer_t HAL_timer_get_count(const uint8_t timer_num) {
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return pConfig->pTimerRegs->TC_CHANNEL[pConfig->channel].TC_CV;
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}
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FORCE_INLINE static void HAL_timer_set_count(const uint8_t timer_num, const hal_timer_t counter) {
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const tTimerConfig * const pConfig = &TimerConfig[timer_num];
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pConfig->pTimerRegs->TC_CHANNEL[pConfig->channel].TC_CV = counter;
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}
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// if counter too high then bump up compare
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FORCE_INLINE static void HAL_timer_restrain(const uint8_t timer_num, const uint16_t interval_ticks) {
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const hal_timer_t mincmp = HAL_timer_get_count(timer_num) + interval_ticks;
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if (HAL_timer_get_compare(timer_num) < mincmp) HAL_timer_set_compare(timer_num, mincmp);
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}
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// if counter too high then clear it
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FORCE_INLINE static void HAL_timer_restrain_count(const uint8_t timer_num, const uint16_t interval_ticks) {
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const hal_timer_t mincmp = HAL_timer_get_count(timer_num) + interval_ticks;
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if (HAL_timer_get_compare(timer_num) < mincmp) HAL_timer_set_count(timer_num, 0);
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}
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void HAL_timer_enable_interrupt(const uint8_t timer_num);
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void HAL_timer_disable_interrupt(const uint8_t timer_num);
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bool HAL_timer_interrupt_enabled(const uint8_t timer_num);
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|
|
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@ -33,17 +33,10 @@
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static pin_t tone_pin;
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volatile static int32_t toggles;
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void toneInit() {
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HAL_timer_start(TONE_TIMER_NUM, 100000);
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HAL_timer_disable_interrupt(TONE_TIMER_NUM);
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}
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void tone(const pin_t _pin, const unsigned int frequency, const unsigned long duration) {
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tone_pin = _pin;
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toggles = 2 * frequency * duration / 1000;
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HAL_timer_set_count(TONE_TIMER_NUM, 0); // ensure first beep is correct (make sure counter is less than the compare value)
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HAL_timer_set_compare(TONE_TIMER_NUM, VARIANT_MCK / 2 / 2 / frequency); // 84MHz / 2 prescaler / 2 interrupts per cycle /Hz
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HAL_timer_enable_interrupt(TONE_TIMER_NUM);
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HAL_timer_start(TONE_TIMER_NUM, 2 * frequency);
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}
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void noTone(const pin_t _pin) {
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|
|
@ -60,7 +53,6 @@ HAL_TONE_TIMER_ISR {
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digitalWrite(tone_pin, (pin_state ^= 1));
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}
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else noTone(tone_pin); // turn off interrupt
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HAL_timer_restrain_count(TONE_TIMER_NUM, 10); // make sure next ISR isn't delayed by up to 2 minutes
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}
|
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|
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#endif // ARDUINO_ARCH_SAM
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|
|
|
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|
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@ -642,5 +642,6 @@ U16 stream_stop(U8 id)
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|
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//! @}
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||||
|
||||
#endif // ACCESS_STREAM == true
|
||||
#endif
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#endif // ACCESS_STREAM
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||||
|
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#endif // ARDUINO_ARCH_SAM
|
||||
|
|
|
|||
|
|
@ -119,4 +119,4 @@ void sysclk_disable_usb(void)
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/**INDENT-ON**/
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/// @endcond
|
||||
|
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#endif
|
||||
#endif // ARDUINO_ARCH_SAM
|
||||
|
|
|
|||
|
|
@ -1146,4 +1146,4 @@ bool udc_process_setup(void)
|
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|
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//! @}
|
||||
|
||||
#endif
|
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#endif // ARDUINO_ARCH_SAM
|
||||
|
|
|
|||
|
|
@ -1152,4 +1152,4 @@ iram_size_t udi_cdc_write_buf(const void* buf, iram_size_t size)
|
|||
|
||||
//@}
|
||||
|
||||
#endif
|
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#endif // ARDUINO_ARCH_SAM
|
||||
|
|
|
|||
|
|
@ -255,5 +255,7 @@ UDC_DESC_STORAGE udc_config_t udc_config = {
|
|||
|
||||
//@}
|
||||
//@}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif // SDSUPPORT
|
||||
|
||||
#endif // ARDUINO_ARCH_SAM
|
||||
|
|
|
|||
|
|
@ -187,5 +187,6 @@ UDC_DESC_STORAGE udc_config_t udc_config = {
|
|||
/**INDENT-ON**/
|
||||
//@}
|
||||
|
||||
#endif
|
||||
#endif
|
||||
#endif // ARDUINO_ARCH_SAM
|
||||
|
||||
#endif // SDSUPPORT
|
||||
|
|
|
|||
|
|
@ -1127,5 +1127,6 @@ bool udi_msc_trans_block(bool b_read, uint8_t * block, iram_size_t block_size,
|
|||
|
||||
//@}
|
||||
|
||||
#endif
|
||||
#endif
|
||||
#endif // SDSUPPORT
|
||||
|
||||
#endif // ARDUINO_ARCH_SAM
|
||||
|
|
|
|||
|
|
@ -2070,4 +2070,4 @@ static bool udd_ep_interrupt(void)
|
|||
|
||||
//@}
|
||||
|
||||
#endif
|
||||
#endif // ARDUINO_ARCH_SAM
|
||||
|
|
|
|||
|
|
@ -238,5 +238,4 @@ void otg_dual_disable(void);
|
|||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* UOTGHS_OTG_H_INCLUDED */
|
||||
|
|
|
|||
|
|
@ -56,7 +56,7 @@
|
|||
static volatile bool main_b_cdc_enable = false;
|
||||
static volatile bool main_b_dtr_active = false;
|
||||
|
||||
void HAL_idletask(void) {
|
||||
void usb_task_idle(void) {
|
||||
#if ENABLED(SDSUPPORT)
|
||||
// Attend SD card access from the USB MSD -- Prioritize access to improve speed
|
||||
int delay = 2;
|
||||
|
|
@ -107,8 +107,15 @@ void usb_task_cdc_set_dtr(const uint8_t port, const bool b_enable) {
|
|||
|
||||
if (1200 == dwDTERate) {
|
||||
// We check DTR state to determine if host port is open (bit 0 of lineState).
|
||||
if (!b_enable)
|
||||
if (!b_enable) {
|
||||
|
||||
// Set RST pin to go low for 65535 clock cycles on reset
|
||||
// This helps restarting when firmware flash ends
|
||||
RSTC->RSTC_MR = 0xA5000F01;
|
||||
|
||||
// Schedule delayed reset
|
||||
initiateReset(250);
|
||||
}
|
||||
else
|
||||
cancelReset();
|
||||
}
|
||||
|
|
@ -290,7 +297,7 @@ bool usb_task_other_requests(void) {
|
|||
return true;
|
||||
}
|
||||
|
||||
void HAL_init(void) {
|
||||
void usb_task_init(void) {
|
||||
|
||||
uint16_t *ptr;
|
||||
|
||||
|
|
|
|||
|
|
@ -49,6 +49,10 @@
|
|||
|
||||
#include "usb_protocol_cdc.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*! \brief Called by MSC interface
|
||||
* Callback running when USB Host enable MSC interface
|
||||
*
|
||||
|
|
@ -111,8 +115,20 @@ void usb_task_cdc_rx_notify(const uint8_t port);
|
|||
*/
|
||||
void usb_task_cdc_config(const uint8_t port, usb_cdc_line_coding_t *cfg);
|
||||
|
||||
/* The USB device interrupt
|
||||
/*! \brief The USB device interrupt
|
||||
*/
|
||||
void USBD_ISR(void);
|
||||
|
||||
#endif // _MAIN_H_
|
||||
/*! \brief USB task init
|
||||
*/
|
||||
void usb_task_init(void);
|
||||
|
||||
/*! \brief USB task idle
|
||||
*/
|
||||
void usb_task_idle(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // _USB_TASK_H_
|
||||
|
|
|
|||
|
|
@ -23,17 +23,88 @@
|
|||
#ifdef ARDUINO_ARCH_SAM
|
||||
|
||||
#include "../../inc/MarlinConfig.h"
|
||||
#include "../../Marlin.h"
|
||||
#include "watchdog_Due.h"
|
||||
|
||||
// Override Arduino runtime to either config or disable the watchdog
|
||||
//
|
||||
// We need to configure the watchdog as soon as possible in the boot
|
||||
// process, because watchdog initialization at hardware reset on SAM3X8E
|
||||
// is unreliable, and there is risk of unintended resets if we delay
|
||||
// that initialization to a later time.
|
||||
void watchdogSetup(void) {
|
||||
|
||||
#if ENABLED(USE_WATCHDOG)
|
||||
|
||||
#include "watchdog_Due.h"
|
||||
// 4 seconds timeout
|
||||
uint32_t timeout = 4000;
|
||||
|
||||
void watchdogSetup(void) {
|
||||
// do whatever. don't remove this function.
|
||||
// Calculate timeout value in WDT counter ticks: This assumes
|
||||
// the slow clock is running at 32.768 kHz watchdog
|
||||
// frequency is therefore 32768 / 128 = 256 Hz
|
||||
timeout = (timeout << 8) / 1000;
|
||||
if (timeout == 0)
|
||||
timeout = 1;
|
||||
else if (timeout > 0xFFF)
|
||||
timeout = 0xFFF;
|
||||
|
||||
// We want to enable the watchdog with the specified timeout
|
||||
uint32_t value =
|
||||
WDT_MR_WDV(timeout) | // With the specified timeout
|
||||
WDT_MR_WDD(timeout) | // and no invalid write window
|
||||
#if !(SAMV70 || SAMV71 || SAME70 || SAMS70)
|
||||
WDT_MR_WDRPROC | // WDT fault resets processor only - We want
|
||||
// to keep PIO controller state
|
||||
#endif
|
||||
WDT_MR_WDDBGHLT | // WDT stops in debug state.
|
||||
WDT_MR_WDIDLEHLT; // WDT stops in idle state.
|
||||
|
||||
#if ENABLED(WATCHDOG_RESET_MANUAL)
|
||||
// We enable the watchdog timer, but only for the interrupt.
|
||||
|
||||
// Configure WDT to only trigger an interrupt
|
||||
value |= WDT_MR_WDFIEN; // Enable WDT fault interrupt.
|
||||
|
||||
// Disable WDT interrupt (just in case, to avoid triggering it!)
|
||||
NVIC_DisableIRQ(WDT_IRQn);
|
||||
|
||||
// Initialize WDT with the given parameters
|
||||
WDT_Enable(WDT, value);
|
||||
|
||||
// Configure and enable WDT interrupt.
|
||||
NVIC_ClearPendingIRQ(WDT_IRQn);
|
||||
NVIC_SetPriority(WDT_IRQn, 0); // Use highest priority, so we detect all kinds of lockups
|
||||
NVIC_EnableIRQ(WDT_IRQn);
|
||||
|
||||
#else
|
||||
|
||||
// a WDT fault triggers a reset
|
||||
value |= WDT_MR_WDRSTEN;
|
||||
|
||||
// Initialize WDT with the given parameters
|
||||
WDT_Enable(WDT, value);
|
||||
|
||||
#endif
|
||||
|
||||
// Reset the watchdog
|
||||
WDT_Restart(WDT);
|
||||
|
||||
#else
|
||||
|
||||
// Make sure to completely disable the Watchdog
|
||||
WDT_Disable(WDT);
|
||||
|
||||
#endif
|
||||
}
|
||||
|
||||
void watchdog_init(void) { watchdogEnable(4000); }
|
||||
|
||||
#if ENABLED(USE_WATCHDOG)
|
||||
// Initialize watchdog - On SAM3X, Watchdog was already configured
|
||||
// and enabled or disabled at startup, so no need to reconfigure it
|
||||
// here.
|
||||
void watchdog_init(void) {
|
||||
// Reset watchdog to start clean
|
||||
WDT_Restart(WDT);
|
||||
}
|
||||
#endif // USE_WATCHDOG
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -648,9 +648,6 @@ void setup() {
|
|||
|
||||
#ifdef HAL_INIT
|
||||
HAL_init();
|
||||
#if defined(ARDUINO_ARCH_SAM) && PIN_EXISTS(BEEPER) && ENABLED(SPEAKER)
|
||||
toneInit();
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if ENABLED(MAX7219_DEBUG)
|
||||
|
|
|
|||
|
|
@ -1396,4 +1396,7 @@
|
|||
#define HAS_FOLDER_SORTING (FOLDER_SORTING || ENABLED(SDSORT_GCODE))
|
||||
#endif
|
||||
|
||||
// If platform requires early initialization of watchdog to properly boot
|
||||
#define EARLY_WATCHDOG (ENABLED(USE_WATCHDOG) && defined(ARDUINO_ARCH_SAM))
|
||||
|
||||
#endif // CONDITIONALS_POST_H
|
||||
|
|
|
|||
|
|
@ -117,6 +117,10 @@ int16_t Temperature::current_temperature_raw[HOTENDS] = { 0 },
|
|||
|
||||
// private:
|
||||
|
||||
#if EARLY_WATCHDOG
|
||||
bool Temperature::inited = false;
|
||||
#endif
|
||||
|
||||
#if ENABLED(TEMP_SENSOR_1_AS_REDUNDANT)
|
||||
uint16_t Temperature::redundant_temperature_raw = 0;
|
||||
float Temperature::redundant_temperature = 0.0;
|
||||
|
|
@ -761,6 +765,14 @@ float Temperature::get_pid_output(const int8_t e) {
|
|||
*/
|
||||
void Temperature::manage_heater() {
|
||||
|
||||
#if EARLY_WATCHDOG
|
||||
// If thermal manager is still not running, make sure to at least reset the watchdog!
|
||||
if (!inited) {
|
||||
watchdog_reset();
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if ENABLED(PROBING_HEATERS_OFF) && ENABLED(BED_LIMIT_SWITCHING)
|
||||
static bool last_pause_state;
|
||||
#endif
|
||||
|
|
@ -1053,6 +1065,12 @@ void Temperature::updateTemperaturesFromRawValues() {
|
|||
*/
|
||||
void Temperature::init() {
|
||||
|
||||
#if EARLY_WATCHDOG
|
||||
// Flag that the thermalManager should be running
|
||||
if (inited) return;
|
||||
inited = true;
|
||||
#endif
|
||||
|
||||
#if MB(RUMBA) && (TEMP_SENSOR_0 == -1 || TEMP_SENSOR_1 == -1 || TEMP_SENSOR_2 == -1 || TEMP_SENSOR_BED == -1)
|
||||
// Disable RUMBA JTAG in case the thermocouple extension is plugged on top of JTAG connector
|
||||
MCUCR = _BV(JTD);
|
||||
|
|
|
|||
|
|
@ -202,6 +202,11 @@ class Temperature {
|
|||
|
||||
private:
|
||||
|
||||
#if EARLY_WATCHDOG
|
||||
// If temperature controller is running
|
||||
static bool inited;
|
||||
#endif
|
||||
|
||||
#if ENABLED(TEMP_SENSOR_1_AS_REDUNDANT)
|
||||
static uint16_t redundant_temperature_raw;
|
||||
static float redundant_temperature;
|
||||
|
|
|
|||
|
|
@ -260,6 +260,11 @@ bool Sd2Card::init(uint8_t sckRateID, pin_t chipSelectPin) {
|
|||
// must supply min of 74 clock cycles with CS high.
|
||||
for (uint8_t i = 0; i < 10; i++) spiSend(0xFF);
|
||||
|
||||
// Initialization can cause the watchdog to timeout, so reinit it here
|
||||
#if ENABLED(USE_WATCHDOG)
|
||||
watchdog_reset();
|
||||
#endif
|
||||
|
||||
// command to go idle in SPI mode
|
||||
while ((status_ = cardCommand(CMD0, 0)) != R1_IDLE_STATE) {
|
||||
if (((uint16_t)millis() - t0) > SD_INIT_TIMEOUT) {
|
||||
|
|
@ -272,6 +277,11 @@ bool Sd2Card::init(uint8_t sckRateID, pin_t chipSelectPin) {
|
|||
crcSupported = (cardCommand(CMD59, 1) == R1_IDLE_STATE);
|
||||
#endif
|
||||
|
||||
// Initialization can cause the watchdog to timeout, so reinit it here
|
||||
#if ENABLED(USE_WATCHDOG)
|
||||
watchdog_reset();
|
||||
#endif
|
||||
|
||||
// check SD version
|
||||
for (;;) {
|
||||
if (cardCommand(CMD8, 0x1AA) == (R1_ILLEGAL_COMMAND | R1_IDLE_STATE)) {
|
||||
|
|
@ -292,6 +302,11 @@ bool Sd2Card::init(uint8_t sckRateID, pin_t chipSelectPin) {
|
|||
}
|
||||
}
|
||||
|
||||
// Initialization can cause the watchdog to timeout, so reinit it here
|
||||
#if ENABLED(USE_WATCHDOG)
|
||||
watchdog_reset();
|
||||
#endif
|
||||
|
||||
// initialize card and send host supports SDHC if SD2
|
||||
arg = type() == SD_CARD_TYPE_SD2 ? 0x40000000 : 0;
|
||||
while ((status_ = cardAcmd(ACMD41, arg)) != R1_READY_STATE) {
|
||||
|
|
|
|||
Loading…
Reference in a new issue