Support FYSETC_MINI_12864 on Re-ARM, RAMPS_FD, MKS SBASE (#13717)
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9992c424f5
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9b578ca343
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@ -65,10 +65,76 @@
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#undef SPI_SPEED
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#undef SPI_SPEED
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#define SPI_SPEED 2 // About 2 MHz
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#define SPI_SPEED 2 // About 2 MHz
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#include <algorithm>
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#include <LPC17xx.h>
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#include <gpio.h>
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#include <Arduino.h>
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uint8_t swSpiTransfer_mode_0(uint8_t b, const uint8_t spi_speed, const pin_t sck_pin, const pin_t miso_pin, const pin_t mosi_pin ) {
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for (uint8_t i = 0; i < 8; i++) {
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if (spi_speed == 0) {
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gpio_set(mosi_pin, !!(b & 0x80));
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gpio_set(sck_pin, HIGH);
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b <<= 1;
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if (miso_pin >= 0 && gpio_get(miso_pin)) b |= 1;
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gpio_set(sck_pin, LOW);
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}
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else {
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const uint8_t state = (b & 0x80) ? HIGH : LOW;
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for (uint8_t j = 0; j < spi_speed; j++)
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gpio_set(mosi_pin, state);
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for (uint8_t j = 0; j < spi_speed + (miso_pin >= 0 ? 0 : 1); j++)
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gpio_set(sck_pin, HIGH);
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b <<= 1;
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if (miso_pin >= 0 && gpio_get(miso_pin)) b |= 1;
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for (uint8_t j = 0; j < spi_speed; j++)
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gpio_set(sck_pin, LOW);
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}
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}
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return b;
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}
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uint8_t swSpiTransfer_mode_3(uint8_t b, const uint8_t spi_speed, const pin_t sck_pin, const pin_t miso_pin, const pin_t mosi_pin ) {
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for (uint8_t i = 0; i < 8; i++) {
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const uint8_t state = (b & 0x80) ? HIGH : LOW;
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if (spi_speed == 0) {
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gpio_set(sck_pin, LOW);
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gpio_set(mosi_pin, state);
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gpio_set(mosi_pin, state); // need some setup time
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gpio_set(sck_pin, HIGH);
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}
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else {
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for (uint8_t j = 0; j < spi_speed + (miso_pin >= 0 ? 0 : 1); j++)
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gpio_set(sck_pin, LOW);
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for (uint8_t j = 0; j < spi_speed; j++)
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gpio_set(mosi_pin, state);
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for (uint8_t j = 0; j < spi_speed; j++)
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gpio_set(sck_pin, HIGH);
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}
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b <<= 1;
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if (miso_pin >= 0 && gpio_get(miso_pin)) b |= 1;
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}
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return b;
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}
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static uint8_t SPI_speed = 0;
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static uint8_t SPI_speed = 0;
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static void u8g_sw_spi_HAL_LPC1768_shift_out(uint8_t dataPin, uint8_t clockPin, uint8_t val) {
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static void u8g_sw_spi_HAL_LPC1768_shift_out(uint8_t dataPin, uint8_t clockPin, uint8_t val) {
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swSpiTransfer(val, SPI_speed, clockPin, -1, dataPin);
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#if ENABLED(FYSETC_MINI_12864)
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swSpiTransfer_mode_3(val, SPI_speed, clockPin, -1, dataPin);
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#else
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swSpiTransfer_mode_0(val, SPI_speed, clockPin, -1, dataPin);
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#endif
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}
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}
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uint8_t u8g_com_HAL_LPC1768_sw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr) {
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uint8_t u8g_com_HAL_LPC1768_sw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr) {
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@ -143,6 +143,8 @@
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#define DOGLCD
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#define DOGLCD
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#define ULTIPANEL
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#define ULTIPANEL
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#define LCD_CONTRAST_MIN 0
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#define LCD_CONTRAST_MAX 255
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#define DEFAULT_LCD_CONTRAST 255
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#define DEFAULT_LCD_CONTRAST 255
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#define LED_COLORS_REDUCE_GREEN
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#define LED_COLORS_REDUCE_GREEN
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@ -112,7 +112,11 @@
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//#define U8G_CLASS U8GLIB_MINI12864
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//#define U8G_CLASS U8GLIB_MINI12864
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//#define U8G_PARAM DOGLCD_CS, DOGLCD_A0 // 8 stripes
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//#define U8G_PARAM DOGLCD_CS, DOGLCD_A0 // 8 stripes
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#define U8G_CLASS U8GLIB_MINI12864_2X
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#define U8G_CLASS U8GLIB_MINI12864_2X
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#define U8G_PARAM DOGLCD_CS, DOGLCD_A0 // 4 stripes
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#if EITHER(FYSETC_MINI_12864, TARGET_LPC1768)
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#define U8G_PARAM DOGLCD_SCK, DOGLCD_MOSI, DOGLCD_CS, DOGLCD_A0 // 4 stripes SW-SPI
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#else
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#define U8G_PARAM DOGLCD_CS, DOGLCD_A0 // 4 stripes HW-SPI
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#endif
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#elif ENABLED(U8GLIB_SH1106_EINSTART)
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#elif ENABLED(U8GLIB_SH1106_EINSTART)
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// Connected via motherboard header
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// Connected via motherboard header
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#define U8G_CLASS U8GLIB_SH1106_128X64
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#define U8G_CLASS U8GLIB_SH1106_128X64
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@ -253,6 +253,41 @@
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#define DOGLCD_SCK SCK_PIN
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#define DOGLCD_SCK SCK_PIN
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#define DOGLCD_MOSI MOSI_PIN
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#define DOGLCD_MOSI MOSI_PIN
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#endif
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#endif
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#if ENABLED(FYSETC_MINI_12864)
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/**
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* The Fysetc display can NOT use the SCK and MOSI pins on EXP2, so a
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* special cable is needed to go between EXP2 on the FYSETC and the
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* controller board's EXP2 and J8. It also means that a software SPI
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* is needed to drive those pins.
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*
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* The Fysetc requires mode 3 SPI interface.
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*
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* Pins 6, 7 & 8 on EXP2 are no connects. That means a second special
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* cable will be needed if the RGB LEDs are to be active.
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*/
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#define DOGLCD_CS LCD_PINS_ENABLE // EXP1.3 (LCD_EN on Fysetc schematic)
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#define DOGLCD_A0 LCD_PINS_RS // EXP1.4 (LCD_A0 on Fysetc schematic)
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#define DOGLCD_SCK P2_11 // J8-5 (SCK on Fysetc schematic)
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#define DOGLCD_MOSI P4_28 // J8-6 (MOSI on Fysetc schematic)
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#define RGB_LED
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//#define RGBW_LED
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#if EITHER(RGB_LED, RGBW_LED)
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#define RGB_LED_R_PIN P2_12 // J8-4 (LCD_D6 on Fysetc schematic)
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#define RGB_LED_G_PIN P1_23 // J8-3 (LCD_D5 on Fysetc schematic)
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#define RGB_LED_B_PIN P1_22 // J8-2 (LCD_D7 on Fysetc schematic)
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//#define RGB_LED_W_PIN -1
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#endif
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#elif ENABLED(MINIPANEL)
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// GLCD features
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// Uncomment screen orientation
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//#define LCD_SCREEN_ROT_90
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//#define LCD_SCREEN_ROT_180
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//#define LCD_SCREEN_ROT_270
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#endif
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#endif
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#endif
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/**
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/**
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@ -156,7 +156,10 @@
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#define LCD_PINS_D7 29
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#define LCD_PINS_D7 29
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#endif
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#endif
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#if ENABLED(MINIPANEL)
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#if ENABLED(FYSETC_MINI_12864)
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#define DOGLCD_CS LCD_PINS_ENABLE
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#define DOGLCD_A0 LCD_PINS_RS
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#elif ENABLED(MINIPANEL)
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#define DOGLCD_CS 25
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#define DOGLCD_CS 25
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#define DOGLCD_A0 27
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#define DOGLCD_A0 27
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#endif
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#endif
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@ -269,11 +269,21 @@
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#elif ENABLED(ULTRA_LCD)
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#elif ENABLED(ULTRA_LCD)
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#define BEEPER_PIN P1_30 // (37) not 5V tolerant
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//#define SCK_PIN P0_15 // (52) system defined J3-9 & AUX-3
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//#define MISO_PIN P0_17 // (50) system defined J3-10 & AUX-3
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//#define MOSI_PIN P0_18 // (51) system defined J3-10 & AUX-3
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//#define SS_PIN P1_23 // (53) system defined J3-5 & AUX-3 (Sometimes called SDSS)
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#if ENABLED(FYSETC_MINI_12864)
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#define BEEPER_PIN P1_01
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#define BTN_ENC P1_04
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#else
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#define BEEPER_PIN P1_30 // (37) not 5V tolerant
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#define BTN_ENC P2_11 // (35) J3-3 & AUX-4
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#endif
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#define BTN_EN1 P3_26 // (31) J3-2 & AUX-4
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#define BTN_EN1 P3_26 // (31) J3-2 & AUX-4
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#define BTN_EN2 P3_25 // (33) J3-4 & AUX-4
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#define BTN_EN2 P3_25 // (33) J3-4 & AUX-4
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#define BTN_ENC P2_11 // (35) J3-3 & AUX-4
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#define SD_DETECT_PIN P1_31 // (49) J3-1 & AUX-3 (NOT 5V tolerant)
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#define SD_DETECT_PIN P1_31 // (49) J3-1 & AUX-3 (NOT 5V tolerant)
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#define KILL_PIN P1_22 // (41) J5-4 & AUX-4
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#define KILL_PIN P1_22 // (41) J5-4 & AUX-4
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@ -296,13 +306,6 @@
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#if ANY(VIKI2, miniVIKI)
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#if ANY(VIKI2, miniVIKI)
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// #define LCD_SCREEN_ROT_180
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// #define LCD_SCREEN_ROT_180
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#define BTN_EN1 P3_26 // (31) J3-2 & AUX-4
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#define BTN_EN2 P3_25 // (33) J3-4 & AUX-4
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#define BTN_ENC P2_11 // (35) J3-3 & AUX-4
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#define SD_DETECT_PIN P1_31 // (49) J3-1 & AUX-3 (NOT 5V tolerant)
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#define KILL_PIN P1_22 // (41) J5-4 & AUX-4
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#define DOGLCD_CS P0_16 // (16)
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#define DOGLCD_CS P0_16 // (16)
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#define DOGLCD_A0 P2_06 // (59) J3-8 & AUX-2
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#define DOGLCD_A0 P2_06 // (59) J3-8 & AUX-2
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#define DOGLCD_SCK SCK_PIN
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#define DOGLCD_SCK SCK_PIN
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@ -311,8 +314,17 @@
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#define STAT_LED_BLUE_PIN P0_26 //(63) may change if cable changes
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#define STAT_LED_BLUE_PIN P0_26 //(63) may change if cable changes
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#define STAT_LED_RED_PIN P1_21 // ( 6) may change if cable changes
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#define STAT_LED_RED_PIN P1_21 // ( 6) may change if cable changes
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#else
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#else
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#define DOGLCD_CS P0_26 // (63) J5-3 & AUX-2
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#define DOGLCD_A0 P2_06 // (59) J3-8 & AUX-2
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#if ENABLED(FYSETC_MINI_12864)
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#define DOGLCD_SCK P0_15
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#define DOGLCD_MOSI P0_18
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#define DOGLCD_CS P1_09 // use Ethernet connector for EXP1 cable signals
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#define DOGLCD_A0 P1_14
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#else
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#define DOGLCD_CS P0_26 // (63) J5-3 & AUX-2
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#define DOGLCD_A0 P2_06 // (59) J3-8 & AUX-2
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#endif
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#define LCD_BACKLIGHT_PIN P0_16 //(16) J3-7 & AUX-4 - only used on DOGLCD controllers
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#define LCD_BACKLIGHT_PIN P0_16 //(16) J3-7 & AUX-4 - only used on DOGLCD controllers
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#define LCD_PINS_ENABLE P0_18 // (51) (MOSI) J3-10 & AUX-3
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#define LCD_PINS_ENABLE P0_18 // (51) (MOSI) J3-10 & AUX-3
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#define LCD_PINS_D4 P0_15 // (52) (SCK) J3-9 & AUX-3
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#define LCD_PINS_D4 P0_15 // (52) (SCK) J3-9 & AUX-3
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#endif
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#endif
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#endif
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#endif
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//#define MISO_PIN P0_17 // (50) system defined J3-10 & AUX-3
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//#define MOSI_PIN P0_18 // (51) system defined J3-10 & AUX-3
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//#define SCK_PIN P0_15 // (52) system defined J3-9 & AUX-3
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//#define SS_PIN P1_23 // (53) system defined J3-5 & AUX-3 (Sometimes called SDSS)
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#if ENABLED(MINIPANEL)
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#if ENABLED(MINIPANEL)
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// GLCD features
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// GLCD features
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// Uncomment screen orientation
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// Uncomment screen orientation
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@ -362,10 +369,10 @@
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#if ENABLED(LPC_SD_LCD)
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#if ENABLED(LPC_SD_LCD)
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#define SCK_PIN P0_15
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#define SCK_PIN P0_15 // (52) system defined J3-9 & AUX-3
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#define MISO_PIN P0_17
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#define MISO_PIN P0_17 // (50) system defined J3-10 & AUX-3
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#define MOSI_PIN P0_18
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#define MOSI_PIN P0_18 // (51) system defined J3-10 & AUX-3
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#define SS_PIN P1_23 // Chip select for SD card used by Marlin
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#define SS_PIN P1_23 // (53) system defined J3-5 & AUX-3 (Sometimes called SDSS) - CS used by Marlin
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#define ONBOARD_SD_CS P0_06 // Chip select for "System" SD card
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#define ONBOARD_SD_CS P0_06 // Chip select for "System" SD card
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#elif ENABLED(LPC_SD_ONBOARD)
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#elif ENABLED(LPC_SD_ONBOARD)
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