⚡️ SPI+DMA+interrupt method (STM32 / MKS UI) (#23464)
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01cb7c19f9
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@ -242,5 +242,29 @@ void TFT_SPI::TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Coun
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Abort();
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Abort();
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}
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}
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#if ENABLED(USE_SPI_DMA_TC)
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void TFT_SPI::TransmitDMA_IT(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count) {
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DMAtx.Init.MemInc = MemoryIncrease;
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HAL_DMA_Init(&DMAtx);
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if (TFT_MISO_PIN == TFT_MOSI_PIN)
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SPI_1LINE_TX(&SPIx);
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DataTransferBegin();
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HAL_NVIC_SetPriority(DMA2_Stream3_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn);
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HAL_DMA_Start_IT(&DMAtx, (uint32_t)Data, (uint32_t)&(SPIx.Instance->DR), Count);
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__HAL_SPI_ENABLE(&SPIx);
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SET_BIT(SPIx.Instance->CR2, SPI_CR2_TXDMAEN); // Enable Tx DMA Request
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}
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extern "C" void DMA2_Stream3_IRQHandler(void) { HAL_DMA_IRQHandler(&TFT_SPI::DMAtx); }
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#endif
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#endif // HAS_SPI_TFT
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#endif // HAS_SPI_TFT
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#endif // HAL_STM32
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#endif // HAL_STM32
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@ -43,13 +43,18 @@
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class TFT_SPI {
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class TFT_SPI {
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private:
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private:
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static SPI_HandleTypeDef SPIx;
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static SPI_HandleTypeDef SPIx;
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static DMA_HandleTypeDef DMAtx;
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static uint32_t ReadID(uint16_t Reg);
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static uint32_t ReadID(uint16_t Reg);
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static void Transmit(uint16_t Data);
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static void Transmit(uint16_t Data);
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static void TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count);
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static void TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count);
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#if ENABLED(USE_SPI_DMA_TC)
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static void TransmitDMA_IT(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count);
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#endif
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public:
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public:
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static DMA_HandleTypeDef DMAtx;
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static void Init();
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static void Init();
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static uint32_t GetID();
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static uint32_t GetID();
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static bool isBusy();
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static bool isBusy();
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@ -63,6 +68,11 @@ public:
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static void WriteReg(uint16_t Reg) { WRITE(TFT_A0_PIN, LOW); Transmit(Reg); WRITE(TFT_A0_PIN, HIGH); }
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static void WriteReg(uint16_t Reg) { WRITE(TFT_A0_PIN, LOW); Transmit(Reg); WRITE(TFT_A0_PIN, HIGH); }
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static void WriteSequence(uint16_t *Data, uint16_t Count) { TransmitDMA(DMA_MINC_ENABLE, Data, Count); }
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static void WriteSequence(uint16_t *Data, uint16_t Count) { TransmitDMA(DMA_MINC_ENABLE, Data, Count); }
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#if ENABLED(USE_SPI_DMA_TC)
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static void WriteSequenceIT(uint16_t *Data, uint16_t Count) { TransmitDMA_IT(DMA_MINC_ENABLE, Data, Count); }
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#endif
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static void WriteMultiple(uint16_t Color, uint16_t Count) { static uint16_t Data; Data = Color; TransmitDMA(DMA_MINC_DISABLE, &Data, Count); }
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static void WriteMultiple(uint16_t Color, uint16_t Count) { static uint16_t Data; Data = Color; TransmitDMA(DMA_MINC_DISABLE, &Data, Count); }
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static void WriteMultiple(uint16_t Color, uint32_t Count) {
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static void WriteMultiple(uint16_t Color, uint32_t Count) {
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static uint16_t Data; Data = Color;
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static uint16_t Data; Data = Color;
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@ -1331,7 +1331,6 @@ void lv_screen_menu_item_onoff_update(lv_obj_t *btn, const bool curValue) {
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lv_label_set_text((lv_obj_t*)btn->child_ll.head, curValue ? machine_menu.enable : machine_menu.disable);
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lv_label_set_text((lv_obj_t*)btn->child_ll.head, curValue ? machine_menu.enable : machine_menu.disable);
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}
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}
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#if ENABLED(SDSUPPORT)
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#if ENABLED(SDSUPPORT)
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void sd_detection() {
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void sd_detection() {
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@ -1360,6 +1359,8 @@ void print_time_count() {
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}
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}
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void LV_TASK_HANDLER() {
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void LV_TASK_HANDLER() {
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if (TERN1(USE_SPI_DMA_TC, !get_lcd_dma_lock()))
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lv_task_handler();
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lv_task_handler();
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#if BOTH(MKS_TEST, SDSUPPORT)
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#if BOTH(MKS_TEST, SDSUPPORT)
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@ -133,6 +133,27 @@ void tft_lvgl_init() {
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watchdog_refresh(); // LVGL init takes time
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watchdog_refresh(); // LVGL init takes time
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#if ENABLED(USB_FLASH_DRIVE_SUPPORT)
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uint16_t usb_flash_loop = 1000;
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#if ENABLED(MULTI_VOLUME) && !HAS_SD_HOST_DRIVE
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SET_INPUT_PULLUP(SD_DETECT_PIN);
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if (READ(SD_DETECT_PIN) == LOW) card.changeMedia(&card.media_driver_sdcard);
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else card.changeMedia(&card.media_driver_usbFlash);
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#endif
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do {
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card.media_driver_usbFlash.idle();
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watchdog_refresh();
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delay(2);
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} while (!card.media_driver_usbFlash.isInserted() && usb_flash_loop--);
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card.mount();
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#elif HAS_LOGO_IN_FLASH
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delay(1000);
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watchdog_refresh();
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delay(1000);
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#endif
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watchdog_refresh(); // LVGL init takes time
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#if ENABLED(SDSUPPORT)
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#if ENABLED(SDSUPPORT)
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UpdateAssets();
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UpdateAssets();
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watchdog_refresh(); // LVGL init takes time
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watchdog_refresh(); // LVGL init takes time
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@ -231,19 +252,44 @@ void tft_lvgl_init() {
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#endif
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#endif
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}
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}
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static lv_disp_drv_t* disp_drv_p;
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#if ENABLED(USE_SPI_DMA_TC)
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bool lcd_dma_trans_lock = false;
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#endif
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void dmc_tc_handler(struct __DMA_HandleTypeDef * hdma) {
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#if ENABLED(USE_SPI_DMA_TC)
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lv_disp_flush_ready(disp_drv_p);
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lcd_dma_trans_lock = false;
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TFT_SPI::Abort();
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#endif
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}
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void my_disp_flush(lv_disp_drv_t * disp, const lv_area_t * area, lv_color_t * color_p) {
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void my_disp_flush(lv_disp_drv_t * disp, const lv_area_t * area, lv_color_t * color_p) {
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uint16_t width = area->x2 - area->x1 + 1,
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uint16_t width = area->x2 - area->x1 + 1,
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height = area->y2 - area->y1 + 1;
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height = area->y2 - area->y1 + 1;
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TERN_(USE_SPI_DMA_TC, disp_drv_p = disp);
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SPI_TFT.setWindow((uint16_t)area->x1, (uint16_t)area->y1, width, height);
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SPI_TFT.setWindow((uint16_t)area->x1, (uint16_t)area->y1, width, height);
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#if ENABLED(USE_SPI_DMA_TC)
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lcd_dma_trans_lock = true;
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SPI_TFT.tftio.WriteSequenceIT((uint16_t*)color_p, width * height);
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TFT_SPI::DMAtx.XferCpltCallback = dmc_tc_handler;
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#else
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SPI_TFT.tftio.WriteSequence((uint16_t*)color_p, width * height);
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SPI_TFT.tftio.WriteSequence((uint16_t*)color_p, width * height);
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lv_disp_flush_ready(disp_drv_p); // Indicate you are ready with the flushing
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lv_disp_flush_ready(disp); // Indicate you are ready with the flushing
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#endif
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W25QXX.init(SPI_QUARTER_SPEED);
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W25QXX.init(SPI_QUARTER_SPEED);
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}
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}
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#if ENABLED(USE_SPI_DMA_TC)
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bool get_lcd_dma_lock() { return lcd_dma_trans_lock; }
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#endif
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void lv_fill_rect(lv_coord_t x1, lv_coord_t y1, lv_coord_t x2, lv_coord_t y2, lv_color_t bk_color) {
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void lv_fill_rect(lv_coord_t x1, lv_coord_t y1, lv_coord_t x2, lv_coord_t y2, lv_color_t bk_color) {
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uint16_t width, height;
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uint16_t width, height;
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width = x2 - x1 + 1;
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width = x2 - x1 + 1;
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@ -64,6 +64,8 @@ lv_fs_res_t sd_tell_cb(lv_fs_drv_t * drv, void * file_p, uint32_t * pos_p);
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void lv_fill_rect(lv_coord_t x1, lv_coord_t y1, lv_coord_t x2, lv_coord_t y2, lv_color_t bk_color);
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void lv_fill_rect(lv_coord_t x1, lv_coord_t y1, lv_coord_t x2, lv_coord_t y2, lv_color_t bk_color);
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bool get_lcd_dma_lock();
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#ifdef __cplusplus
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#ifdef __cplusplus
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} /* C-declarations for C++ */
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} /* C-declarations for C++ */
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#endif
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#endif
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@ -121,6 +121,11 @@ public:
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inline static void WriteReg(uint16_t Reg) { io.WriteReg(Reg); };
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inline static void WriteReg(uint16_t Reg) { io.WriteReg(Reg); };
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inline static void WriteSequence(uint16_t *Data, uint16_t Count) { io.WriteSequence(Data, Count); };
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inline static void WriteSequence(uint16_t *Data, uint16_t Count) { io.WriteSequence(Data, Count); };
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#if ENABLED(USE_SPI_DMA_TC)
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inline static void WriteSequenceIT(uint16_t *Data, uint16_t Count) { io.WriteSequenceIT(Data, Count); };
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#endif
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// static void WriteMultiple(uint16_t Color, uint16_t Count) { static uint16_t Data; Data = Color; TransmitDMA(DMA_MINC_DISABLE, &Data, Count); }
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// static void WriteMultiple(uint16_t Color, uint16_t Count) { static uint16_t Data; Data = Color; TransmitDMA(DMA_MINC_DISABLE, &Data, Count); }
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inline static void WriteMultiple(uint16_t Color, uint32_t Count) { io.WriteMultiple(Color, Count); };
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inline static void WriteMultiple(uint16_t Color, uint32_t Count) { io.WriteMultiple(Color, Count); };
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@ -44,6 +44,10 @@
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//#define LED_PIN PB2
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//#define LED_PIN PB2
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#if HAS_TFT_LVGL_UI
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#define BOARD_INIT OUT_WRITE(PB0, LOW)
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#endif
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#include "pins_MKS_ROBIN_NANO_common.h"
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#include "pins_MKS_ROBIN_NANO_common.h"
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#if HAS_TFT_LVGL_UI && FAN1_PIN != PB0 && HEATER_1_PIN != PB0
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#if HAS_TFT_LVGL_UI && FAN1_PIN != PB0 && HEATER_1_PIN != PB0
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@ -366,9 +366,15 @@
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#endif // HAS_WIRED_LCD
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#endif // HAS_WIRED_LCD
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#if HAS_TFT_LVGL_UI
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#define USE_SPI_DMA_TC
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#endif
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#if ANY(TFT_COLOR_UI, TFT_LVGL_UI, TFT_CLASSIC_UI, HAS_WIRED_LCD)
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#if ANY(TFT_COLOR_UI, TFT_LVGL_UI, TFT_CLASSIC_UI, HAS_WIRED_LCD)
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#define BEEPER_PIN EXP1_10_PIN
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#define BEEPER_PIN EXP1_10_PIN
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#if DISABLED(USE_SPI_DMA_TC)
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#define BTN_EN1 EXP2_08_PIN
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#define BTN_EN1 EXP2_08_PIN
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#define BTN_EN2 EXP2_06_PIN
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#define BTN_EN2 EXP2_06_PIN
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#define BTN_ENC EXP1_09_PIN
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#define BTN_ENC EXP1_09_PIN
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#endif
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#endif
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#endif
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