Cleanup for HAL_spi_Due.cpp
This commit is contained in:
Scott Lahteine
parent
d82bcdeea1
commit
bc75eb2c64
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@ -581,84 +581,124 @@
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// --------------------------------------------------------------------------
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// hardware SPI
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// --------------------------------------------------------------------------
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// 8.4 MHz, 4 MHz, 2 MHz, 1 MHz, 0.5 MHz, 0.329 MHz, 0.329 MHz
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int spiDueDividors[] = { 10, 21, 42, 84, 168, 255, 255 };
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bool spiInitMaded = false;
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void spiBegin() {
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if (spiInitMaded == false) {
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// Configure SPI pins
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PIO_Configure(
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g_APinDescription[SCK_PIN].pPort,
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g_APinDescription[SCK_PIN].ulPinType,
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g_APinDescription[SCK_PIN].ulPin,
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g_APinDescription[SCK_PIN].ulPinConfiguration);
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PIO_Configure(
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g_APinDescription[MOSI_PIN].pPort,
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g_APinDescription[MOSI_PIN].ulPinType,
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g_APinDescription[MOSI_PIN].ulPin,
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g_APinDescription[MOSI_PIN].ulPinConfiguration);
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PIO_Configure(
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g_APinDescription[MISO_PIN].pPort,
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g_APinDescription[MISO_PIN].ulPinType,
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g_APinDescription[MISO_PIN].ulPin,
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g_APinDescription[MISO_PIN].ulPinConfiguration);
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// set master mode, peripheral select, fault detection
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SPI_Configure(SPI0, ID_SPI0, SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_MR_PS);
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SPI_Enable(SPI0);
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#if MB(ALLIGATOR)
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SET_OUTPUT(DAC0_SYNC);
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#if EXTRUDERS > 1
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SET_OUTPUT(DAC1_SYNC);
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WRITE(DAC1_SYNC, HIGH);
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#endif
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SET_OUTPUT(SPI_EEPROM1_CS);
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SET_OUTPUT(SPI_EEPROM2_CS);
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SET_OUTPUT(SPI_FLASH_CS);
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WRITE(DAC0_SYNC, HIGH);
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WRITE(SPI_EEPROM1_CS, HIGH );
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WRITE(SPI_EEPROM2_CS, HIGH );
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WRITE(SPI_FLASH_CS, HIGH );
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WRITE(SS_PIN, HIGH );
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#endif // MB(ALLIGATOR)
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OUT_WRITE(SDSS,0);
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PIO_Configure(
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g_APinDescription[SPI_PIN].pPort,
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g_APinDescription[SPI_PIN].ulPinType,
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g_APinDescription[SPI_PIN].ulPin,
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g_APinDescription[SPI_PIN].ulPinConfiguration);
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spiInit(1);
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spiInitMaded = true;
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}
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}
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static bool spiInitialized = false;
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void spiInit(uint8_t spiRate) {
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if (spiInitMaded == false) {
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if (spiRate > 6) spiRate = 1;
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if (spiInitialized) return;
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#if MB(ALLIGATOR)
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// Set SPI mode 1, clock, select not active after transfer, with delay between transfers
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SPI_ConfigureNPCS(SPI0, SPI_CHAN_DAC,
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SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiRate]) |
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SPI_CSR_DLYBCT(1));
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// Set SPI mode 0, clock, select not active after transfer, with delay between transfers
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SPI_ConfigureNPCS(SPI0, SPI_CHAN_EEPROM1, SPI_CSR_NCPHA |
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SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiRate]) |
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SPI_CSR_DLYBCT(1));
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#endif//MB(ALLIGATOR)
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// 8.4 MHz, 4 MHz, 2 MHz, 1 MHz, 0.5 MHz, 0.329 MHz, 0.329 MHz
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constexpr int spiDivider[] = { 10, 21, 42, 84, 168, 255, 255 };
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if (spiRate > 6) spiRate = 1;
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// Set SPI mode 0, clock, select not active after transfer, with delay between transfers
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SPI_ConfigureNPCS(SPI0, SPI_CHAN, SPI_CSR_NCPHA |
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SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiRate]) |
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SPI_CSR_DLYBCT(1));
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SPI_Enable(SPI0);
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spiInitMaded = true;
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// Set SPI mode 1, clock, select not active after transfer, with delay between transfers
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SPI_ConfigureNPCS(SPI0, SPI_CHAN_DAC,
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SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDivider[spiRate]) |
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SPI_CSR_DLYBCT(1));
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// Set SPI mode 0, clock, select not active after transfer, with delay between transfers
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SPI_ConfigureNPCS(SPI0, SPI_CHAN_EEPROM1, SPI_CSR_NCPHA |
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SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDivider[spiRate]) |
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SPI_CSR_DLYBCT(1));
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// Set SPI mode 0, clock, select not active after transfer, with delay between transfers
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SPI_ConfigureNPCS(SPI0, SPI_CHAN, SPI_CSR_NCPHA |
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SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDivider[spiRate]) |
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SPI_CSR_DLYBCT(1));
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SPI_Enable(SPI0);
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spiInitialized = true;
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}
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void spiBegin() {
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if (spiInitialized) return;
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// Configure SPI pins
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PIO_Configure(
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g_APinDescription[SCK_PIN].pPort,
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g_APinDescription[SCK_PIN].ulPinType,
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g_APinDescription[SCK_PIN].ulPin,
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g_APinDescription[SCK_PIN].ulPinConfiguration);
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PIO_Configure(
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g_APinDescription[MOSI_PIN].pPort,
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g_APinDescription[MOSI_PIN].ulPinType,
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g_APinDescription[MOSI_PIN].ulPin,
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g_APinDescription[MOSI_PIN].ulPinConfiguration);
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PIO_Configure(
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g_APinDescription[MISO_PIN].pPort,
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g_APinDescription[MISO_PIN].ulPinType,
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g_APinDescription[MISO_PIN].ulPin,
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g_APinDescription[MISO_PIN].ulPinConfiguration);
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// set master mode, peripheral select, fault detection
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SPI_Configure(SPI0, ID_SPI0, SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_MR_PS);
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SPI_Enable(SPI0);
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SET_OUTPUT(DAC0_SYNC);
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#if EXTRUDERS > 1
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SET_OUTPUT(DAC1_SYNC);
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WRITE(DAC1_SYNC, HIGH);
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#endif
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SET_OUTPUT(SPI_EEPROM1_CS);
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SET_OUTPUT(SPI_EEPROM2_CS);
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SET_OUTPUT(SPI_FLASH_CS);
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WRITE(DAC0_SYNC, HIGH);
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WRITE(SPI_EEPROM1_CS, HIGH );
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WRITE(SPI_EEPROM2_CS, HIGH );
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WRITE(SPI_FLASH_CS, HIGH );
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WRITE(SS_PIN, HIGH );
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OUT_WRITE(SDSS,0);
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PIO_Configure(
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g_APinDescription[SPI_PIN].pPort,
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g_APinDescription[SPI_PIN].ulPinType,
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g_APinDescription[SPI_PIN].ulPin,
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g_APinDescription[SPI_PIN].ulPinConfiguration);
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spiInit(1);
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}
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// Read single byte from SPI
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uint8_t spiRec() {
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// write dummy byte with address and end transmission flag
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SPI0->SPI_TDR = 0x000000FF | SPI_PCS(SPI_CHAN) | SPI_TDR_LASTXFER;
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// wait for transmit register empty
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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// wait for receive register
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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// get byte from receive register
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//DELAY_US(1U);
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return SPI0->SPI_RDR;
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}
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uint8_t spiRec(uint32_t chan) {
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uint8_t spirec_tmp;
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// wait for transmit register empty
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1)
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spirec_tmp = SPI0->SPI_RDR;
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UNUSED(spirec_tmp);
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// write dummy byte with address and end transmission flag
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SPI0->SPI_TDR = 0x000000FF | SPI_PCS(chan) | SPI_TDR_LASTXFER;
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// wait for receive register
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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// get byte from receive register
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return SPI0->SPI_RDR;
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}
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// Read from SPI into buffer
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void spiRead(uint8_t* buf, uint16_t nbyte) {
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if (nbyte-- == 0) return;
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for (int i = 0; i < nbyte; i++) {
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//while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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SPI0->SPI_TDR = 0x000000FF | SPI_PCS(SPI_CHAN);
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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buf[i] = SPI0->SPI_RDR;
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//DELAY_US(1U);
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}
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buf[nbyte] = spiRec();
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}
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// Write single byte to SPI
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@ -714,51 +754,6 @@
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spiSend(chan, buf[n - 1]);
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}
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// Read single byte from SPI
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uint8_t spiRec() {
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// write dummy byte with address and end transmission flag
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SPI0->SPI_TDR = 0x000000FF | SPI_PCS(SPI_CHAN) | SPI_TDR_LASTXFER;
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// wait for transmit register empty
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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// wait for receive register
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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// get byte from receive register
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//DELAY_US(1U);
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return SPI0->SPI_RDR;
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}
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uint8_t spiRec(uint32_t chan) {
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uint8_t spirec_tmp;
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// wait for transmit register empty
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1)
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spirec_tmp = SPI0->SPI_RDR;
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UNUSED(spirec_tmp);
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// write dummy byte with address and end transmission flag
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SPI0->SPI_TDR = 0x000000FF | SPI_PCS(chan) | SPI_TDR_LASTXFER;
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// wait for receive register
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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// get byte from receive register
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return SPI0->SPI_RDR;
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}
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// Read from SPI into buffer
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void spiRead(uint8_t* buf, uint16_t nbyte) {
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if (nbyte-- == 0) return;
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for (int i = 0; i < nbyte; i++) {
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//while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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SPI0->SPI_TDR = 0x000000FF | SPI_PCS(SPI_CHAN);
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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buf[i] = SPI0->SPI_RDR;
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//DELAY_US(1U);
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}
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buf[nbyte] = spiRec();
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}
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// Write from buffer to SPI
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void spiSendBlock(uint8_t token, const uint8_t* buf) {
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SPI0->SPI_TDR = (uint32_t)token | SPI_PCS(SPI_CHAN);
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@ -780,7 +775,7 @@
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// TODO: to be implemented
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}
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#else // U8G compatible hardware SPI
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#else // U8G compatible hardware SPI
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#define SPI_MODE_0_DUE_HW 2 // DUE CPHA control bit is inverted
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#define SPI_MODE_1_DUE_HW 3
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@ -789,7 +784,7 @@
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void spiInit(uint8_t spiRate=6) { // Default to slowest rate if not specified)
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// 8.4 MHz, 4 MHz, 2 MHz, 1 MHz, 0.5 MHz, 0.329 MHz, 0.329 MHz
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int spiDueDividors[] = { 10, 21, 42, 84, 168, 255, 255 };
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constexpr int spiDivider[] = { 10, 21, 42, 84, 168, 255, 255 };
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if (spiRate > 6) spiRate = 1;
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// Enable PIOA and SPI0
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@ -809,7 +804,11 @@
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// Master mode, no fault detection, PCS bits in data written to TDR select CSR register
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SPI0->SPI_MR = SPI_MR_MSTR | SPI_MR_PS | SPI_MR_MODFDIS;
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// SPI mode 0, 8 Bit data transfer, baud rate
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SPI0->SPI_CSR[3] = SPI_CSR_SCBR(spiDueDividors[spiRate]) | SPI_CSR_CSAAT | SPI_MODE_0_DUE_HW; // use same CSR as TMC2130
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SPI0->SPI_CSR[3] = SPI_CSR_SCBR(spiDivider[spiRate]) | SPI_CSR_CSAAT | SPI_MODE_0_DUE_HW; // use same CSR as TMC2130
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}
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void spiBegin() {
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spiInit();
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}
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static uint8_t spiTransfer(uint8_t data) {
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@ -828,10 +827,6 @@
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return SPI0->SPI_RDR;
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}
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void spiBegin() {
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spiInit();
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}
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uint8_t spiRec() {
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uint8_t data = spiTransfer(0xFF);
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return data;
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