Fix up various spacing, comments, and typos
This commit is contained in:
parent
d45f19d385
commit
ca577c1638
|
@ -93,11 +93,11 @@
|
||||||
#define MAXNOPS 4
|
#define MAXNOPS 4
|
||||||
|
|
||||||
if (x <= (MAXNOPS)) {
|
if (x <= (MAXNOPS)) {
|
||||||
switch(x) { case 4: nop(); case 3: nop(); case 2: nop(); case 1: nop(); }
|
switch (x) { case 4: nop(); case 3: nop(); case 2: nop(); case 1: nop(); }
|
||||||
}
|
}
|
||||||
else { // because of +1 cycle inside delay_4cycles
|
else { // because of +1 cycle inside delay_4cycles
|
||||||
const uint32_t rem = (x - 1) % (MAXNOPS);
|
const uint32_t rem = (x - 1) % (MAXNOPS);
|
||||||
switch(rem) { case 3: nop(); case 2: nop(); case 1: nop(); }
|
switch (rem) { case 3: nop(); case 2: nop(); case 1: nop(); }
|
||||||
if ((x = (x - 1) / (MAXNOPS)))
|
if ((x = (x - 1) / (MAXNOPS)))
|
||||||
__delay_4cycles(x); // if need more then 4 nop loop is more optimal
|
__delay_4cycles(x); // if need more then 4 nop loop is more optimal
|
||||||
}
|
}
|
||||||
|
|
|
@ -20,40 +20,38 @@
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/*
|
/**
|
||||||
|
* Based on u8g_com_st7920_hw_spi.c
|
||||||
based on u8g_com_st7920_hw_spi.c
|
*
|
||||||
|
* Universal 8bit Graphics Library
|
||||||
Universal 8bit Graphics Library
|
*
|
||||||
|
* Copyright (c) 2011, olikraus@gmail.com
|
||||||
Copyright (c) 2011, olikraus@gmail.com
|
* All rights reserved.
|
||||||
All rights reserved.
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
Redistribution and use in source and binary forms, with or without modification,
|
* are permitted provided that the following conditions are met:
|
||||||
are permitted provided that the following conditions are met:
|
*
|
||||||
|
* * Redistributions of source code must retain the above copyright notice, this list
|
||||||
* Redistributions of source code must retain the above copyright notice, this list
|
* of conditions and the following disclaimer.
|
||||||
of conditions and the following disclaimer.
|
*
|
||||||
|
* * Redistributions in binary form must reproduce the above copyright notice, this
|
||||||
* Redistributions in binary form must reproduce the above copyright notice, this
|
* list of conditions and the following disclaimer in the documentation and/or other
|
||||||
list of conditions and the following disclaimer in the documentation and/or other
|
* materials provided with the distribution.
|
||||||
materials provided with the distribution.
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
||||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
||||||
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||||
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||||
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
||||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
*/
|
||||||
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifdef ARDUINO_ARCH_SAM
|
#ifdef ARDUINO_ARCH_SAM
|
||||||
|
|
||||||
|
|
|
@ -218,7 +218,7 @@ bool LPC1768_PWM_attach_pin(pin_t pin, uint32_t min /* = 1 */, uint32_t max /* =
|
||||||
pin = GET_PIN_MAP_PIN(GET_PIN_MAP_INDEX(pin & 0xFF)); // Sometimes the upper byte is garbled
|
pin = GET_PIN_MAP_PIN(GET_PIN_MAP_INDEX(pin & 0xFF)); // Sometimes the upper byte is garbled
|
||||||
|
|
||||||
//// direct control PWM code
|
//// direct control PWM code
|
||||||
switch(pin) {
|
switch (pin) {
|
||||||
case P1_23: // MKS Sbase Servo 0, PWM1 channel 4 (J3-8 PWM1.4)
|
case P1_23: // MKS Sbase Servo 0, PWM1 channel 4 (J3-8 PWM1.4)
|
||||||
direct_table[P1_23_PWM_channel - 1].min = min;
|
direct_table[P1_23_PWM_channel - 1].min = min;
|
||||||
direct_table[P1_23_PWM_channel - 1].max = MIN(max, LPC_PWM1_MR0 - MR0_MARGIN);
|
direct_table[P1_23_PWM_channel - 1].max = MIN(max, LPC_PWM1_MR0 - MR0_MARGIN);
|
||||||
|
@ -298,7 +298,7 @@ bool LPC1768_PWM_detach_pin(pin_t pin) {
|
||||||
pin = GET_PIN_MAP_PIN(GET_PIN_MAP_INDEX(pin & 0xFF));
|
pin = GET_PIN_MAP_PIN(GET_PIN_MAP_INDEX(pin & 0xFF));
|
||||||
|
|
||||||
//// direct control PWM code
|
//// direct control PWM code
|
||||||
switch(pin) {
|
switch (pin) {
|
||||||
case P1_23: // MKS Sbase Servo 0, PWM1 channel 4 (J3-8 PWM1.4)
|
case P1_23: // MKS Sbase Servo 0, PWM1 channel 4 (J3-8 PWM1.4)
|
||||||
if (!direct_table[P1_23_PWM_channel - 1].assigned) return false;
|
if (!direct_table[P1_23_PWM_channel - 1].assigned) return false;
|
||||||
CBI(LPC_PWM1->PCR, 8 + P1_23_PWM_channel); // disable PWM1 module control of this pin
|
CBI(LPC_PWM1->PCR, 8 + P1_23_PWM_channel); // disable PWM1 module control of this pin
|
||||||
|
@ -373,7 +373,7 @@ bool LPC1768_PWM_write(pin_t pin, uint32_t value) {
|
||||||
pin = GET_PIN_MAP_PIN(GET_PIN_MAP_INDEX(pin & 0xFF));
|
pin = GET_PIN_MAP_PIN(GET_PIN_MAP_INDEX(pin & 0xFF));
|
||||||
|
|
||||||
//// direct control PWM code
|
//// direct control PWM code
|
||||||
switch(pin) {
|
switch (pin) {
|
||||||
case P1_23: // MKS Sbase Servo 0, PWM1 channel 4 (J3-8 PWM1.4)
|
case P1_23: // MKS Sbase Servo 0, PWM1 channel 4 (J3-8 PWM1.4)
|
||||||
if (!direct_table[P1_23_PWM_channel - 1].assigned) return false;
|
if (!direct_table[P1_23_PWM_channel - 1].assigned) return false;
|
||||||
LPC_PWM1->PCR |= _BV(8 + P1_23_PWM_channel); // enable PWM1 module control of this pin
|
LPC_PWM1->PCR |= _BV(8 + P1_23_PWM_channel); // enable PWM1 module control of this pin
|
||||||
|
|
|
@ -70,7 +70,7 @@ extern "C" void delay(const int msec) {
|
||||||
}
|
}
|
||||||
|
|
||||||
// IO functions
|
// IO functions
|
||||||
// As defined by Arduino INPUT(0x0), OUPUT(0x1), INPUT_PULLUP(0x2)
|
// As defined by Arduino INPUT(0x0), OUTPUT(0x1), INPUT_PULLUP(0x2)
|
||||||
void pinMode(const pin_t pin, const uint8_t mode) {
|
void pinMode(const pin_t pin, const uint8_t mode) {
|
||||||
if (!VALID_PIN(pin)) return;
|
if (!VALID_PIN(pin)) return;
|
||||||
|
|
||||||
|
|
|
@ -54,7 +54,7 @@ uint8_t LPC1768_PIN_PIN(const uint8_t pin);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
// I/O functions
|
// I/O functions
|
||||||
// As defined by Arduino INPUT(0x0), OUPUT(0x1), INPUT_PULLUP(0x2)
|
// As defined by Arduino INPUT(0x0), OUTPUT(0x1), INPUT_PULLUP(0x2)
|
||||||
void pinMode_LCD(uint8_t pin, uint8_t mode) {
|
void pinMode_LCD(uint8_t pin, uint8_t mode) {
|
||||||
#define LPC1768_PIN_PORT(pin) ((uint8_t)((pin >> 5) & 0b111))
|
#define LPC1768_PIN_PORT(pin) ((uint8_t)((pin >> 5) & 0b111))
|
||||||
#define LPC1768_PIN_PIN(pin) ((uint8_t)(pin & 0b11111))
|
#define LPC1768_PIN_PIN(pin) ((uint8_t)(pin & 0b11111))
|
||||||
|
|
|
@ -20,123 +20,116 @@
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
/*
|
* Based on u8g_com_msp430_hw_spi.c
|
||||||
|
*
|
||||||
based on u8g_com_msp430_hw_spi.c
|
* Universal 8bit Graphics Library
|
||||||
|
*
|
||||||
Universal 8bit Graphics Library
|
* Copyright (c) 2011, olikraus@gmail.com
|
||||||
|
* All rights reserved.
|
||||||
Copyright (c) 2012, olikraus@gmail.com
|
*
|
||||||
All rights reserved.
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
* are permitted provided that the following conditions are met:
|
||||||
Redistribution and use in source and binary forms, with or without modification,
|
*
|
||||||
are permitted provided that the following conditions are met:
|
* * Redistributions of source code must retain the above copyright notice, this list
|
||||||
|
* of conditions and the following disclaimer.
|
||||||
* Redistributions of source code must retain the above copyright notice, this list
|
*
|
||||||
of conditions and the following disclaimer.
|
* * Redistributions in binary form must reproduce the above copyright notice, this
|
||||||
|
* list of conditions and the following disclaimer in the documentation and/or other
|
||||||
* Redistributions in binary form must reproduce the above copyright notice, this
|
* materials provided with the distribution.
|
||||||
list of conditions and the following disclaimer in the documentation and/or other
|
*
|
||||||
materials provided with the distribution.
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
||||||
|
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
||||||
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||||
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||||
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
||||||
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
*/
|
||||||
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
#ifdef TARGET_LPC1768
|
#ifdef TARGET_LPC1768
|
||||||
|
|
||||||
//#include <inttypes.h>
|
//#include <inttypes.h>
|
||||||
|
|
||||||
//#include "src/core/macros.h"
|
//#include "src/core/macros.h"
|
||||||
//#include "Configuration.h"
|
//#include "Configuration.h"
|
||||||
|
|
||||||
#include <U8glib.h>
|
#include <U8glib.h>
|
||||||
|
|
||||||
#define SPI_FULL_SPEED 0
|
#define SPI_FULL_SPEED 0
|
||||||
#define SPI_HALF_SPEED 1
|
#define SPI_HALF_SPEED 1
|
||||||
#define SPI_QUARTER_SPEED 2
|
#define SPI_QUARTER_SPEED 2
|
||||||
#define SPI_EIGHTH_SPEED 3
|
#define SPI_EIGHTH_SPEED 3
|
||||||
#define SPI_SIXTEENTH_SPEED 4
|
#define SPI_SIXTEENTH_SPEED 4
|
||||||
#define SPI_SPEED_5 5
|
#define SPI_SPEED_5 5
|
||||||
#define SPI_SPEED_6 6
|
#define SPI_SPEED_6 6
|
||||||
|
|
||||||
void spiBegin();
|
void spiBegin();
|
||||||
void spiInit(uint8_t spiRate);
|
void spiInit(uint8_t spiRate);
|
||||||
void spiSend(uint8_t b);
|
void spiSend(uint8_t b);
|
||||||
void spiSend(const uint8_t* buf, size_t n);
|
void spiSend(const uint8_t* buf, size_t n);
|
||||||
|
|
||||||
|
uint8_t u8g_com_HAL_LPC1768_hw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr) {
|
||||||
|
switch (msg) {
|
||||||
|
case U8G_COM_MSG_STOP:
|
||||||
|
break;
|
||||||
|
|
||||||
uint8_t u8g_com_HAL_LPC1768_hw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr)
|
case U8G_COM_MSG_INIT:
|
||||||
{
|
u8g_SetPILevel(u8g, U8G_PI_CS, 1);
|
||||||
switch(msg)
|
u8g_SetPILevel(u8g, U8G_PI_A0, 1);
|
||||||
{
|
u8g_SetPILevel(u8g, U8G_PI_RESET, 1);
|
||||||
case U8G_COM_MSG_STOP:
|
u8g_SetPIOutput(u8g, U8G_PI_CS);
|
||||||
break;
|
u8g_SetPIOutput(u8g, U8G_PI_A0);
|
||||||
|
u8g_SetPIOutput(u8g, U8G_PI_RESET);
|
||||||
|
u8g_Delay(5);
|
||||||
|
spiBegin();
|
||||||
|
#ifndef SPI_SPEED
|
||||||
|
#define SPI_SPEED SPI_FULL_SPEED // use same SPI speed as SD card
|
||||||
|
#endif
|
||||||
|
spiInit(SPI_SPEED);
|
||||||
|
break;
|
||||||
|
|
||||||
case U8G_COM_MSG_INIT:
|
case U8G_COM_MSG_ADDRESS: /* define cmd (arg_val = 0) or data mode (arg_val = 1) */
|
||||||
u8g_SetPILevel(u8g, U8G_PI_CS, 1);
|
u8g_SetPILevel(u8g, U8G_PI_A0, arg_val);
|
||||||
u8g_SetPILevel(u8g, U8G_PI_A0, 1);
|
break;
|
||||||
u8g_SetPILevel(u8g, U8G_PI_RESET, 1);
|
|
||||||
u8g_SetPIOutput(u8g, U8G_PI_CS);
|
|
||||||
u8g_SetPIOutput(u8g, U8G_PI_A0);
|
|
||||||
u8g_SetPIOutput(u8g, U8G_PI_RESET);
|
|
||||||
u8g_Delay(5);
|
|
||||||
spiBegin();
|
|
||||||
#ifndef SPI_SPEED
|
|
||||||
#define SPI_SPEED SPI_FULL_SPEED // use same SPI speed as SD card
|
|
||||||
#endif
|
|
||||||
spiInit(SPI_SPEED);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case U8G_COM_MSG_ADDRESS: /* define cmd (arg_val = 0) or data mode (arg_val = 1) */
|
case U8G_COM_MSG_CHIP_SELECT:
|
||||||
u8g_SetPILevel(u8g, U8G_PI_A0, arg_val);
|
u8g_SetPILevel(u8g, U8G_PI_CS, (arg_val ? 0 : 1));
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case U8G_COM_MSG_CHIP_SELECT:
|
case U8G_COM_MSG_RESET:
|
||||||
u8g_SetPILevel(u8g, U8G_PI_CS, (arg_val ? 0 : 1));
|
u8g_SetPILevel(u8g, U8G_PI_RESET, arg_val);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case U8G_COM_MSG_RESET:
|
case U8G_COM_MSG_WRITE_BYTE:
|
||||||
u8g_SetPILevel(u8g, U8G_PI_RESET, arg_val);
|
spiSend((uint8_t)arg_val);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case U8G_COM_MSG_WRITE_BYTE:
|
case U8G_COM_MSG_WRITE_SEQ: {
|
||||||
spiSend((uint8_t)arg_val);
|
uint8_t *ptr = (uint8_t*) arg_ptr;
|
||||||
break;
|
while (arg_val > 0) {
|
||||||
|
spiSend(*ptr++);
|
||||||
case U8G_COM_MSG_WRITE_SEQ: {
|
arg_val--;
|
||||||
uint8_t *ptr = (uint8_t*) arg_ptr;
|
|
||||||
while (arg_val > 0) {
|
|
||||||
spiSend(*ptr++);
|
|
||||||
arg_val--;
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
break;
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
case U8G_COM_MSG_WRITE_SEQ_P: {
|
case U8G_COM_MSG_WRITE_SEQ_P: {
|
||||||
uint8_t *ptr = (uint8_t*) arg_ptr;
|
uint8_t *ptr = (uint8_t*) arg_ptr;
|
||||||
while (arg_val > 0) {
|
while (arg_val > 0) {
|
||||||
spiSend(*ptr++);
|
spiSend(*ptr++);
|
||||||
arg_val--;
|
arg_val--;
|
||||||
}
|
|
||||||
}
|
}
|
||||||
break;
|
}
|
||||||
}
|
break;
|
||||||
return 1;
|
|
||||||
}
|
}
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
#endif //TARGET_LPC1768
|
#endif //TARGET_LPC1768
|
||||||
|
|
|
@ -20,60 +20,60 @@
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Based on u8g_com_arduino_ssd_i2c.c
|
||||||
|
*
|
||||||
|
* COM interface for Arduino (AND ATmega) and the SSDxxxx chip (SOLOMON) variant
|
||||||
|
* I2C protocol
|
||||||
|
*
|
||||||
|
* ToDo: Rename this to u8g_com_avr_ssd_i2c.c
|
||||||
|
*
|
||||||
|
* Universal 8bit Graphics Library
|
||||||
|
*
|
||||||
|
* Copyright (c) 2011, olikraus@gmail.com
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
* are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* * Redistributions of source code must retain the above copyright notice, this list
|
||||||
|
* of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* * Redistributions in binary form must reproduce the above copyright notice, this
|
||||||
|
* list of conditions and the following disclaimer in the documentation and/or other
|
||||||
|
* materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
||||||
|
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
|
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
||||||
|
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||||
|
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||||
|
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
||||||
|
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*/
|
||||||
|
|
||||||
/*
|
/**
|
||||||
|
* Special pin usage:
|
||||||
based on u8g_com_arduino_ssd_i2c.c
|
* U8G_PI_I2C_OPTION additional options
|
||||||
|
* U8G_PI_A0_STATE used to store the last value of the command/data register selection
|
||||||
com interface for arduino (AND atmega) and the SSDxxxx chip (SOLOMON) variant
|
* U8G_PI_SET_A0 1: Signal request to update I2C device with new A0_STATE, 0: Do nothing, A0_STATE matches I2C device
|
||||||
I2C protocol
|
* U8G_PI_SCL clock line (NOT USED)
|
||||||
|
* U8G_PI_SDA data line (NOT USED)
|
||||||
ToDo: Rename this to u8g_com_avr_ssd_i2c.c
|
*
|
||||||
|
* U8G_PI_RESET reset line (currently disabled, see below)
|
||||||
Universal 8bit Graphics Library
|
*
|
||||||
|
* Protocol:
|
||||||
Copyright (c) 2012, olikraus@gmail.com
|
* SLA, Cmd/Data Selection, Arguments
|
||||||
All rights reserved.
|
* The command/data register is selected by a special instruction byte, which is sent after SLA
|
||||||
|
*
|
||||||
Redistribution and use in source and binary forms, with or without modification,
|
* The continue bit is always 0 so that a (re)start is equired for the change from cmd to/data mode
|
||||||
are permitted provided that the following conditions are met:
|
*/
|
||||||
|
|
||||||
* Redistributions of source code must retain the above copyright notice, this list
|
|
||||||
of conditions and the following disclaimer.
|
|
||||||
|
|
||||||
* Redistributions in binary form must reproduce the above copyright notice, this
|
|
||||||
list of conditions and the following disclaimer in the documentation and/or other
|
|
||||||
materials provided with the distribution.
|
|
||||||
|
|
||||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
|
||||||
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
|
||||||
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
|
||||||
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
|
||||||
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
||||||
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
|
||||||
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
|
||||||
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
|
||||||
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
|
||||||
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
|
|
||||||
Special pin usage:
|
|
||||||
U8G_PI_I2C_OPTION additional options
|
|
||||||
U8G_PI_A0_STATE used to store the last value of the command/data register selection
|
|
||||||
U8G_PI_SET_A0 1: Signal request to update I2C device with new A0_STATE, 0: Do nothing, A0_STATE matches I2C device
|
|
||||||
U8G_PI_SCL clock line (NOT USED)
|
|
||||||
U8G_PI_SDA data line (NOT USED)
|
|
||||||
|
|
||||||
U8G_PI_RESET reset line (currently disabled, see below)
|
|
||||||
|
|
||||||
Protocol:
|
|
||||||
SLA, Cmd/Data Selection, Arguments
|
|
||||||
The command/data register is selected by a special instruction byte, which is sent after SLA
|
|
||||||
|
|
||||||
The continue bit is always 0 so that a (re)start is equired for the change from cmd to/data mode
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifdef TARGET_LPC1768
|
#ifdef TARGET_LPC1768
|
||||||
|
|
||||||
|
@ -84,36 +84,27 @@
|
||||||
#define I2C_CMD_MODE 0x000
|
#define I2C_CMD_MODE 0x000
|
||||||
#define I2C_DATA_MODE 0x040
|
#define I2C_DATA_MODE 0x040
|
||||||
|
|
||||||
// #define U8G_I2C_OPT_FAST 16
|
//#define U8G_I2C_OPT_FAST 16
|
||||||
|
|
||||||
uint8_t u8g_com_ssd_I2C_start_sequence(u8g_t *u8g)
|
uint8_t u8g_com_ssd_I2C_start_sequence(u8g_t *u8g) {
|
||||||
{
|
|
||||||
/* are we requested to set the a0 state? */
|
/* are we requested to set the a0 state? */
|
||||||
if ( u8g->pin_list[U8G_PI_SET_A0] == 0 )
|
if (u8g->pin_list[U8G_PI_SET_A0] == 0) return 1;
|
||||||
return 1;
|
|
||||||
|
|
||||||
/* setup bus, might be a repeated start */
|
/* setup bus, might be a repeated start */
|
||||||
if ( u8g_i2c_start(I2C_SLA) == 0 )
|
if (u8g_i2c_start(I2C_SLA) == 0)
|
||||||
return 0;
|
return 0;
|
||||||
if ( u8g->pin_list[U8G_PI_A0_STATE] == 0 )
|
if (u8g->pin_list[U8G_PI_A0_STATE] == 0 ) {
|
||||||
{
|
if (u8g_i2c_send_byte(I2C_CMD_MODE) == 0) return 0;
|
||||||
if ( u8g_i2c_send_byte(I2C_CMD_MODE) == 0 )
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
if ( u8g_i2c_send_byte(I2C_DATA_MODE) == 0 )
|
|
||||||
return 0;
|
|
||||||
}
|
}
|
||||||
|
else if (u8g_i2c_send_byte(I2C_DATA_MODE) == 0)
|
||||||
|
return 0;
|
||||||
|
|
||||||
u8g->pin_list[U8G_PI_SET_A0] = 0;
|
u8g->pin_list[U8G_PI_SET_A0] = 0;
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t u8g_com_HAL_LPC1768_ssd_hw_i2c_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr)
|
uint8_t u8g_com_HAL_LPC1768_ssd_hw_i2c_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr) {
|
||||||
{
|
switch(msg) {
|
||||||
switch(msg)
|
|
||||||
{
|
|
||||||
case U8G_COM_MSG_INIT:
|
case U8G_COM_MSG_INIT:
|
||||||
//u8g_com_arduino_digital_write(u8g, U8G_PI_SCL, HIGH);
|
//u8g_com_arduino_digital_write(u8g, U8G_PI_SCL, HIGH);
|
||||||
//u8g_com_arduino_digital_write(u8g, U8G_PI_SDA, HIGH);
|
//u8g_com_arduino_digital_write(u8g, U8G_PI_SDA, HIGH);
|
||||||
|
@ -134,34 +125,32 @@
|
||||||
case U8G_COM_MSG_CHIP_SELECT:
|
case U8G_COM_MSG_CHIP_SELECT:
|
||||||
u8g->pin_list[U8G_PI_A0_STATE] = 0;
|
u8g->pin_list[U8G_PI_A0_STATE] = 0;
|
||||||
u8g->pin_list[U8G_PI_SET_A0] = 1; /* force a0 to set again, also forces start condition */
|
u8g->pin_list[U8G_PI_SET_A0] = 1; /* force a0 to set again, also forces start condition */
|
||||||
if ( arg_val == 0 )
|
if (arg_val == 0 ) {
|
||||||
{
|
|
||||||
/* disable chip, send stop condition */
|
/* disable chip, send stop condition */
|
||||||
u8g_i2c_stop();
|
u8g_i2c_stop();
|
||||||
}
|
}
|
||||||
else
|
else {
|
||||||
{
|
|
||||||
/* enable, do nothing: any byte writing will trigger the i2c start */
|
/* enable, do nothing: any byte writing will trigger the i2c start */
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case U8G_COM_MSG_WRITE_BYTE:
|
case U8G_COM_MSG_WRITE_BYTE:
|
||||||
//u8g->pin_list[U8G_PI_SET_A0] = 1;
|
//u8g->pin_list[U8G_PI_SET_A0] = 1;
|
||||||
// if ( u8g_com_arduino_ssd_start_sequence(u8g) == 0 )
|
//if (u8g_com_arduino_ssd_start_sequence(u8g) == 0)
|
||||||
// return u8g_i2c_stop(), 0;
|
// return u8g_i2c_stop(), 0;
|
||||||
if ( u8g_i2c_send_byte(arg_val) == 0 )
|
if (u8g_i2c_send_byte(arg_val) == 0)
|
||||||
return u8g_i2c_stop(), 0;
|
return u8g_i2c_stop(), 0;
|
||||||
// u8g_i2c_stop();
|
// u8g_i2c_stop();
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case U8G_COM_MSG_WRITE_SEQ:
|
case U8G_COM_MSG_WRITE_SEQ: {
|
||||||
//u8g->pin_list[U8G_PI_SET_A0] = 1;
|
//u8g->pin_list[U8G_PI_SET_A0] = 1;
|
||||||
if ( u8g_com_ssd_I2C_start_sequence(u8g) == 0 )
|
if (u8g_com_ssd_I2C_start_sequence(u8g) == 0)
|
||||||
return u8g_i2c_stop(), 0;
|
return u8g_i2c_stop(), 0;
|
||||||
{
|
|
||||||
register uint8_t *ptr = (uint8_t *)arg_ptr;
|
register uint8_t *ptr = (uint8_t *)arg_ptr;
|
||||||
while (arg_val > 0) {
|
while (arg_val > 0) {
|
||||||
if ( u8g_i2c_send_byte(*ptr++) == 0 )
|
if (u8g_i2c_send_byte(*ptr++) == 0)
|
||||||
return u8g_i2c_stop(), 0;
|
return u8g_i2c_stop(), 0;
|
||||||
arg_val--;
|
arg_val--;
|
||||||
}
|
}
|
||||||
|
@ -169,14 +158,14 @@
|
||||||
// u8g_i2c_stop();
|
// u8g_i2c_stop();
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case U8G_COM_MSG_WRITE_SEQ_P:
|
case U8G_COM_MSG_WRITE_SEQ_P: {
|
||||||
//u8g->pin_list[U8G_PI_SET_A0] = 1;
|
//u8g->pin_list[U8G_PI_SET_A0] = 1;
|
||||||
if ( u8g_com_ssd_I2C_start_sequence(u8g) == 0 )
|
if (u8g_com_ssd_I2C_start_sequence(u8g) == 0)
|
||||||
return u8g_i2c_stop(), 0;
|
return u8g_i2c_stop(), 0;
|
||||||
{
|
|
||||||
register uint8_t *ptr = (uint8_t *)arg_ptr;
|
register uint8_t *ptr = (uint8_t *)arg_ptr;
|
||||||
while (arg_val > 0) {
|
while (arg_val > 0) {
|
||||||
if ( u8g_i2c_send_byte(u8g_pgm_read(ptr)) == 0 )
|
if (u8g_i2c_send_byte(u8g_pgm_read(ptr)) == 0)
|
||||||
return 0;
|
return 0;
|
||||||
ptr++;
|
ptr++;
|
||||||
arg_val--;
|
arg_val--;
|
||||||
|
@ -190,12 +179,10 @@
|
||||||
u8g->pin_list[U8G_PI_SET_A0] = 1; /* force a0 to set again */
|
u8g->pin_list[U8G_PI_SET_A0] = 1; /* force a0 to set again */
|
||||||
|
|
||||||
u8g_i2c_start(0); // send slave address and write bit
|
u8g_i2c_start(0); // send slave address and write bit
|
||||||
if (arg_val)
|
u8g_i2c_send_byte(arg_val ? 0x40 : 0x80); // Write to ? Graphics DRAM mode : Command mode
|
||||||
u8g_i2c_send_byte(0x40); // write to graphics DRAM mode
|
|
||||||
else
|
|
||||||
u8g_i2c_send_byte(0x80); //command mode
|
|
||||||
break;
|
break;
|
||||||
}
|
|
||||||
|
} // switch
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -20,47 +20,44 @@
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* based on U8G2 code
|
/**
|
||||||
|
* Based on U8G2 code - u8x8_byte.c
|
||||||
|
*
|
||||||
|
* Universal 8bit Graphics Library (https://github.com/olikraus/u8g2/)
|
||||||
|
*
|
||||||
|
* Copyright (c) 2016, olikraus@gmail.com
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
* are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* * Redistributions of source code must retain the above copyright notice, this list
|
||||||
|
* of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* * Redistributions in binary form must reproduce the above copyright notice, this
|
||||||
|
* list of conditions and the following disclaimer in the documentation and/or other
|
||||||
|
* materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
||||||
|
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
|
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
||||||
|
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||||
|
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||||
|
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
||||||
|
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*/
|
||||||
|
|
||||||
u8x8_byte.c
|
/**
|
||||||
|
* Software i2c,
|
||||||
Universal 8bit Graphics Library (https://github.com/olikraus/u8g2/)
|
* ignores ACK response (which is anyway not provided by some displays)
|
||||||
|
* also does not allow reading from the device
|
||||||
Copyright (c) 2016, olikraus@gmail.com
|
*/
|
||||||
All rights reserved.
|
|
||||||
|
|
||||||
Redistribution and use in source and binary forms, with or without modification,
|
|
||||||
are permitted provided that the following conditions are met:
|
|
||||||
|
|
||||||
* Redistributions of source code must retain the above copyright notice, this list
|
|
||||||
of conditions and the following disclaimer.
|
|
||||||
|
|
||||||
* Redistributions in binary form must reproduce the above copyright notice, this
|
|
||||||
list of conditions and the following disclaimer in the documentation and/or other
|
|
||||||
materials provided with the distribution.
|
|
||||||
|
|
||||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
|
||||||
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
|
||||||
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
|
||||||
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
|
||||||
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
||||||
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
|
||||||
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
|
||||||
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
|
||||||
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
|
||||||
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
|
|
||||||
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*
|
|
||||||
software i2c,
|
|
||||||
ignores ACK response (which is anyway not provided by some displays)
|
|
||||||
also does not allow reading from the device
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifdef TARGET_LPC1768
|
#ifdef TARGET_LPC1768
|
||||||
|
|
||||||
|
@ -80,17 +77,13 @@ void delayMicroseconds(uint32_t us);
|
||||||
//#define SPEED_400KHz 3
|
//#define SPEED_400KHz 3
|
||||||
//#define SPEED_100KHz 13
|
//#define SPEED_100KHz 13
|
||||||
|
|
||||||
|
|
||||||
// #define U8G_I2C_OPT_FAST 16
|
// #define U8G_I2C_OPT_FAST 16
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
uint8_t SCL_pin_HAL_LPC1768_sw_I2C, SCL_port_HAL_LPC1768_sw_I2C, SDA_pin_HAL_LPC1768_sw_I2C, SDA_port_HAL_LPC1768_sw_I2C;
|
uint8_t SCL_pin_HAL_LPC1768_sw_I2C, SCL_port_HAL_LPC1768_sw_I2C, SDA_pin_HAL_LPC1768_sw_I2C, SDA_port_HAL_LPC1768_sw_I2C;
|
||||||
|
|
||||||
#define SPI_SPEED 2 //20: 200KHz 5:750KHz 2:3-4MHz
|
#define SPI_SPEED 2 //20: 200KHz 5:750KHz 2:3-4MHz
|
||||||
|
|
||||||
uint8_t u8g_i2c_send_byte_sw(uint8_t data) {
|
uint8_t u8g_i2c_send_byte_sw(uint8_t data) {
|
||||||
{
|
|
||||||
for (uint8_t i = 0; i < 9; i++) { // 1 extra bit for the ack/nak
|
for (uint8_t i = 0; i < 9; i++) { // 1 extra bit for the ack/nak
|
||||||
|
|
||||||
if (val & 0x80)
|
if (val & 0x80)
|
||||||
|
@ -118,14 +111,13 @@ uint8_t u8g_i2c_send_byte_sw(uint8_t data) {
|
||||||
LPC_GPIO(SCL_port_HAL_LPC1768_sw_I2C)->FIOCLR = LPC_PIN(SCL_pin_HAL_LPC1768_sw_I2C);
|
LPC_GPIO(SCL_port_HAL_LPC1768_sw_I2C)->FIOCLR = LPC_PIN(SCL_pin_HAL_LPC1768_sw_I2C);
|
||||||
LPC_GPIO(SCL_port_HAL_LPC1768_sw_I2C)->FIOCLR = LPC_PIN(SCL_pin_HAL_LPC1768_sw_I2C);
|
LPC_GPIO(SCL_port_HAL_LPC1768_sw_I2C)->FIOCLR = LPC_PIN(SCL_pin_HAL_LPC1768_sw_I2C);
|
||||||
}
|
}
|
||||||
val = val << 1;
|
val <<= 1;
|
||||||
}
|
}
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
uint8_t u8g_i2c_start_sw(uint8_t sla) { // assert start condition and then send slave address with write bit
|
uint8_t u8g_i2c_start_sw(uint8_t sla) { // assert start condition and then send slave address with write bit
|
||||||
{
|
|
||||||
/* send the start condition, both lines go from 1 to 0 */
|
/* send the start condition, both lines go from 1 to 0 */
|
||||||
|
|
||||||
LPC_GPIO(SDA_port_HAL_LPC1768_sw_I2C)->FIOCLR = LPC_PIN(SDA_pin_HAL_LPC1768_sw_I2C);
|
LPC_GPIO(SDA_port_HAL_LPC1768_sw_I2C)->FIOCLR = LPC_PIN(SDA_pin_HAL_LPC1768_sw_I2C);
|
||||||
|
@ -143,139 +135,115 @@ uint8_t u8g_i2c_start_sw(uint8_t sla) { // assert start condition and then send
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
void u8g_i2c_stop_sw(void) {
|
void u8g_i2c_stop_sw(void) { }
|
||||||
|
|
||||||
|
void u8g_i2c_init_sw(uint8_t clock_option) { u8g_i2c_start(0); } // send slave address and write bit
|
||||||
|
|
||||||
|
uint8_t u8g_com_ssd_I2C_start_sequence_sw(u8g_t *u8g) {
|
||||||
|
/* are we requested to set the a0 state? */
|
||||||
|
if (u8g->pin_list[U8G_PI_SET_A0] == 0) return 1;
|
||||||
|
|
||||||
|
/* setup bus, might be a repeated start */
|
||||||
|
if (u8g_i2c_start(I2C_SLA) == 0) return 0;
|
||||||
|
if (u8g->pin_list[U8G_PI_A0_STATE] == 0) {
|
||||||
|
if (u8g_i2c_send_byte(I2C_CMD_MODE) == 0) return 0;
|
||||||
|
}
|
||||||
|
else if (u8g_i2c_send_byte(I2C_DATA_MODE) == 0) return 0;
|
||||||
|
|
||||||
|
u8g->pin_list[U8G_PI_SET_A0] = 0;
|
||||||
|
|
||||||
|
return 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
void u8g_i2c_init_sw(uint8_t clock_option) {
|
uint8_t u8g_com_HAL_LPC1768_ssd_sw_i2c_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr) {
|
||||||
u8g_i2c_start(0); // send slave address and write bit
|
switch (msg) {
|
||||||
|
case U8G_COM_MSG_INIT:
|
||||||
|
|
||||||
|
#define LPC1768_PIN_PORT(pin) ((uint8_t)((pin >> 5) & 0b111))
|
||||||
|
#define LPC1768_PIN_PIN(pin) ((uint8_t)(pin & 0b11111))
|
||||||
|
SCL_pin_HAL_LPC1768_sw_I2C = LPC1768_PIN_PIN(u8g->pin_list[U8G_PI_SCL]);
|
||||||
|
SCL_port_HAL_LPC1768_sw_I2C = LPC1768_PIN_PORT(u8g->pin_list[U8G_PI_SCL]);
|
||||||
|
SDA_pin_HAL_LPC1768_sw_I2C = LPC1768_PIN_PIN(u8g->pin_list[U8G_PI_SDA]);
|
||||||
|
SDA_port_HAL_LPC1768_sw_I2C = LPC1768_PIN_PORT(u8g->pin_list[U8G_PI_SDA]);
|
||||||
|
// As defined by Arduino INPUT(0x0), OUTPUT(0x1), INPUT_PULLUP(0x2)
|
||||||
|
#define OUTPUT 0x1
|
||||||
|
u8g_SetPIOutput(u8g, U8G_PI_SCL);
|
||||||
|
u8g_SetPIOutput(u8g, U8G_PI_SDA);
|
||||||
|
if (U8G_PIN_NONE != u8g->pin_list[U8G_PI_CS]) u8g_SetPIOutput(u8g, U8G_PI_CS);
|
||||||
|
if (U8G_PIN_NONE != u8g->pin_list[U8G_PI_A0]) u8g_SetPIOutput(u8g, U8G_PI_A0);
|
||||||
|
if (U8G_PIN_NONE != u8g->pin_list[U8G_PI_RESET]) u8g_SetPIOutput(u8g, U8G_PI_RESET);
|
||||||
|
|
||||||
|
//u8g_com_arduino_digital_write(u8g, U8G_PI_SCL, HIGH);
|
||||||
|
//u8g_com_arduino_digital_write(u8g, U8G_PI_SDA, HIGH);
|
||||||
|
//u8g->pin_list[U8G_PI_A0_STATE] = 0; /* inital RS state: unknown mode */
|
||||||
|
|
||||||
|
u8g_i2c_init_sw(u8g->pin_list[U8G_PI_I2C_OPTION]);
|
||||||
|
u8g_com_ssd_I2C_start_sequence_sw(u8g);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case U8G_COM_MSG_STOP: break;
|
||||||
|
|
||||||
|
case U8G_COM_MSG_RESET: break;
|
||||||
|
|
||||||
|
case U8G_COM_MSG_CHIP_SELECT:
|
||||||
|
u8g->pin_list[U8G_PI_A0_STATE] = 0;
|
||||||
|
u8g->pin_list[U8G_PI_SET_A0] = 1; /* force a0 to set again, also forces start condition */
|
||||||
|
if (arg_val == 0) {
|
||||||
|
/* disable chip, send stop condition */
|
||||||
|
u8g_i2c_stop_sw();
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
/* enable, do nothing: any byte writing will trigger the i2c start */
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
case U8G_COM_MSG_WRITE_BYTE:
|
||||||
|
//u8g->pin_list[U8G_PI_SET_A0] = 1;
|
||||||
|
//if (u8g_com_arduino_ssd_start_sequence(u8g) == 0)
|
||||||
|
// return u8g_i2c_stop(), 0;
|
||||||
|
if (u8g_i2c_send_byte_sw(arg_val) == 0)
|
||||||
|
return u8g_i2c_stop_sw(), 0;
|
||||||
|
// u8g_i2c_stop();
|
||||||
|
break;
|
||||||
|
|
||||||
|
case U8G_COM_MSG_WRITE_SEQ: {
|
||||||
|
//u8g->pin_list[U8G_PI_SET_A0] = 1;
|
||||||
|
if (u8g_com_ssd_I2C_start_sequence_sw(u8g) == 0)
|
||||||
|
return u8g_i2c_stop_sw(), 0;
|
||||||
|
|
||||||
|
register uint8_t *ptr = (uint8_t *)arg_ptr;
|
||||||
|
while (arg_val > 0) {
|
||||||
|
if (u8g_i2c_send_byte_sw(*ptr++) == 0)
|
||||||
|
return u8g_i2c_stop_sw(), 0;
|
||||||
|
arg_val--;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
// u8g_i2c_stop();
|
||||||
|
break;
|
||||||
|
|
||||||
|
case U8G_COM_MSG_WRITE_SEQ_P: {
|
||||||
|
//u8g->pin_list[U8G_PI_SET_A0] = 1;
|
||||||
|
if (u8g_com_ssd_I2C_start_sequence_sw(u8g) == 0)
|
||||||
|
return u8g_i2c_stop_sw(), 0;
|
||||||
|
|
||||||
|
register uint8_t *ptr = (uint8_t *)arg_ptr;
|
||||||
|
while (arg_val > 0) {
|
||||||
|
if (u8g_i2c_send_byte_sw(u8g_pgm_read(ptr)) == 0) return 0;
|
||||||
|
ptr++;
|
||||||
|
arg_val--;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
// u8g_i2c_stop();
|
||||||
|
break;
|
||||||
|
|
||||||
|
case U8G_COM_MSG_ADDRESS: /* define cmd (arg_val = 0) or data mode (arg_val = 1) */
|
||||||
|
u8g->pin_list[U8G_PI_A0_STATE] = arg_val;
|
||||||
|
u8g->pin_list[U8G_PI_SET_A0] = 1; /* force a0 to set again */
|
||||||
|
u8g_i2c_start_sw(0); // send slave address and write bit
|
||||||
|
u8g_i2c_send_byte_sw(arg_val ? 0x40 : 0x80); // Write to ? Graphics DRAM mode : Command mode
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
return 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
uint8_t u8g_com_ssd_I2C_start_sequence_sw(u8g_t *u8g)
|
|
||||||
{
|
|
||||||
/* are we requested to set the a0 state? */
|
|
||||||
if ( u8g->pin_list[U8G_PI_SET_A0] == 0 )
|
|
||||||
return 1;
|
|
||||||
|
|
||||||
/* setup bus, might be a repeated start */
|
|
||||||
if ( u8g_i2c_start(I2C_SLA) == 0 )
|
|
||||||
return 0;
|
|
||||||
if ( u8g->pin_list[U8G_PI_A0_STATE] == 0 )
|
|
||||||
{
|
|
||||||
if ( u8g_i2c_send_byte(I2C_CMD_MODE) == 0 )
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
if ( u8g_i2c_send_byte(I2C_DATA_MODE) == 0 )
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
u8g->pin_list[U8G_PI_SET_A0] = 0;
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
uint8_t u8g_com_HAL_LPC1768_ssd_sw_i2c_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr)
|
|
||||||
{
|
|
||||||
switch(msg)
|
|
||||||
{
|
|
||||||
case U8G_COM_MSG_INIT:
|
|
||||||
|
|
||||||
#define LPC1768_PIN_PORT(pin) ((uint8_t)((pin >> 5) & 0b111))
|
|
||||||
#define LPC1768_PIN_PIN(pin) ((uint8_t)(pin & 0b11111))
|
|
||||||
SCL_pin_HAL_LPC1768_sw_I2C = LPC1768_PIN_PIN(u8g->pin_list[U8G_PI_SCL]);
|
|
||||||
SCL_port_HAL_LPC1768_sw_I2C = LPC1768_PIN_PORT(u8g->pin_list[U8G_PI_SCL]);
|
|
||||||
SDA_pin_HAL_LPC1768_sw_I2C = LPC1768_PIN_PIN(u8g->pin_list[U8G_PI_SDA]);
|
|
||||||
SDA_port_HAL_LPC1768_sw_I2C = LPC1768_PIN_PORT(u8g->pin_list[U8G_PI_SDA]);
|
|
||||||
// As defined by Arduino INPUT(0x0), OUPUT(0x1), INPUT_PULLUP(0x2)
|
|
||||||
#define OUPUT 0x1
|
|
||||||
u8g_SetPIOutput(u8g, U8G_PI_SCL);
|
|
||||||
u8g_SetPIOutput(u8g, U8G_PI_SDA);
|
|
||||||
if (U8G_PIN_NONE != u8g->pin_list[U8G_PI_CS]) u8g_SetPIOutput(u8g, U8G_PI_CS);
|
|
||||||
if (U8G_PIN_NONE != u8g->pin_list[U8G_PI_A0]) u8g_SetPIOutput(u8g, U8G_PI_A0);
|
|
||||||
if (U8G_PIN_NONE != u8g->pin_list[U8G_PI_RESET]) u8g_SetPIOutput(u8g, U8G_PI_RESET);
|
|
||||||
|
|
||||||
//u8g_com_arduino_digital_write(u8g, U8G_PI_SCL, HIGH);
|
|
||||||
//u8g_com_arduino_digital_write(u8g, U8G_PI_SDA, HIGH);
|
|
||||||
//u8g->pin_list[U8G_PI_A0_STATE] = 0; /* inital RS state: unknown mode */
|
|
||||||
|
|
||||||
u8g_i2c_init_sw(u8g->pin_list[U8G_PI_I2C_OPTION]);
|
|
||||||
u8g_com_ssd_I2C_start_sequence_sw((u8g);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case U8G_COM_MSG_STOP:
|
|
||||||
break;
|
|
||||||
|
|
||||||
case U8G_COM_MSG_RESET:
|
|
||||||
break;
|
|
||||||
|
|
||||||
case U8G_COM_MSG_CHIP_SELECT:
|
|
||||||
u8g->pin_list[U8G_PI_A0_STATE] = 0;
|
|
||||||
u8g->pin_list[U8G_PI_SET_A0] = 1; /* force a0 to set again, also forces start condition */
|
|
||||||
if ( arg_val == 0 )
|
|
||||||
{
|
|
||||||
/* disable chip, send stop condition */
|
|
||||||
u8g_i2c_stop_sw();
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
/* enable, do nothing: any byte writing will trigger the i2c start */
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
|
|
||||||
case U8G_COM_MSG_WRITE_BYTE:
|
|
||||||
//u8g->pin_list[U8G_PI_SET_A0] = 1;
|
|
||||||
// if ( u8g_com_arduino_ssd_start_sequence(u8g) == 0 )
|
|
||||||
// return u8g_i2c_stop(), 0;
|
|
||||||
if ( u8g_i2c_send_byte_sw(arg_val) == 0 )
|
|
||||||
return u8g_i2c_stop_sw(), 0;
|
|
||||||
// u8g_i2c_stop();
|
|
||||||
break;
|
|
||||||
|
|
||||||
case U8G_COM_MSG_WRITE_SEQ:
|
|
||||||
//u8g->pin_list[U8G_PI_SET_A0] = 1;
|
|
||||||
if ( u8g_com_ssd_I2C_start_sequence_sw(u8g) == 0 )
|
|
||||||
return u8g_i2c_stop_sw(), 0;
|
|
||||||
{
|
|
||||||
register uint8_t *ptr = (uint8_t *)arg_ptr;
|
|
||||||
while (arg_val > 0) {
|
|
||||||
if ( u8g_i2c_send_byte_sw(*ptr++) == 0 )
|
|
||||||
return u8g_i2c_stop_sw(), 0;
|
|
||||||
arg_val--;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
// u8g_i2c_stop();
|
|
||||||
break;
|
|
||||||
|
|
||||||
case U8G_COM_MSG_WRITE_SEQ_P:
|
|
||||||
//u8g->pin_list[U8G_PI_SET_A0] = 1;
|
|
||||||
if ( u8g_com_ssd_I2C_start_sequence_sw(u8g) == 0 )
|
|
||||||
return u8g_i2c_stop_sw(), 0;
|
|
||||||
{
|
|
||||||
register uint8_t *ptr = (uint8_t *)arg_ptr;
|
|
||||||
while (arg_val > 0) {
|
|
||||||
if ( u8g_i2c_send_byte_sw(u8g_pgm_read(ptr)) == 0 )
|
|
||||||
return 0;
|
|
||||||
ptr++;
|
|
||||||
arg_val--;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
// u8g_i2c_stop();
|
|
||||||
break;
|
|
||||||
|
|
||||||
case U8G_COM_MSG_ADDRESS: /* define cmd (arg_val = 0) or data mode (arg_val = 1) */
|
|
||||||
u8g->pin_list[U8G_PI_A0_STATE] = arg_val;
|
|
||||||
u8g->pin_list[U8G_PI_SET_A0] = 1; /* force a0 to set again */
|
|
||||||
|
|
||||||
u8g_i2c_start_sw(0); // send slave address and write bit
|
|
||||||
if (arg_val)
|
|
||||||
u8g_i2c_send_byte_sw(0x40); // write to graphics DRAM mode
|
|
||||||
else
|
|
||||||
u8g_i2c_send_byte_sw(0x80); //command mode
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif // TARGET_LPC1768
|
#endif // TARGET_LPC1768
|
||||||
|
|
|
@ -20,40 +20,38 @@
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/*
|
/**
|
||||||
|
* Based on u8g_com_LPC1768_st7920_hw_spi.c
|
||||||
based on u8g_com_LPC1768_st7920_hw_spi.c
|
*
|
||||||
|
* Universal 8bit Graphics Library
|
||||||
Universal 8bit Graphics Library
|
*
|
||||||
|
* Copyright (c) 2011, olikraus@gmail.com
|
||||||
Copyright (c) 2011, olikraus@gmail.com
|
* All rights reserved.
|
||||||
All rights reserved.
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
Redistribution and use in source and binary forms, with or without modification,
|
* are permitted provided that the following conditions are met:
|
||||||
are permitted provided that the following conditions are met:
|
*
|
||||||
|
* * Redistributions of source code must retain the above copyright notice, this list
|
||||||
* Redistributions of source code must retain the above copyright notice, this list
|
* of conditions and the following disclaimer.
|
||||||
of conditions and the following disclaimer.
|
*
|
||||||
|
* * Redistributions in binary form must reproduce the above copyright notice, this
|
||||||
* Redistributions in binary form must reproduce the above copyright notice, this
|
* list of conditions and the following disclaimer in the documentation and/or other
|
||||||
list of conditions and the following disclaimer in the documentation and/or other
|
* materials provided with the distribution.
|
||||||
materials provided with the distribution.
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
||||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
||||||
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||||
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||||
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
||||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
*/
|
||||||
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifdef TARGET_LPC1768
|
#ifdef TARGET_LPC1768
|
||||||
|
|
||||||
|
|
|
@ -20,40 +20,38 @@
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/*
|
/**
|
||||||
|
* Based on u8g_com_st7920_hw_spi.c
|
||||||
based on u8g_com_st7920_hw_spi.c
|
*
|
||||||
|
* Universal 8bit Graphics Library
|
||||||
Universal 8bit Graphics Library
|
*
|
||||||
|
* Copyright (c) 2011, olikraus@gmail.com
|
||||||
Copyright (c) 2011, olikraus@gmail.com
|
* All rights reserved.
|
||||||
All rights reserved.
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
Redistribution and use in source and binary forms, with or without modification,
|
* are permitted provided that the following conditions are met:
|
||||||
are permitted provided that the following conditions are met:
|
*
|
||||||
|
* * Redistributions of source code must retain the above copyright notice, this list
|
||||||
* Redistributions of source code must retain the above copyright notice, this list
|
* of conditions and the following disclaimer.
|
||||||
of conditions and the following disclaimer.
|
*
|
||||||
|
* * Redistributions in binary form must reproduce the above copyright notice, this
|
||||||
* Redistributions in binary form must reproduce the above copyright notice, this
|
* list of conditions and the following disclaimer in the documentation and/or other
|
||||||
list of conditions and the following disclaimer in the documentation and/or other
|
* materials provided with the distribution.
|
||||||
materials provided with the distribution.
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
||||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
||||||
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||||
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||||
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
||||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
*/
|
||||||
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifdef TARGET_LPC1768
|
#ifdef TARGET_LPC1768
|
||||||
|
|
||||||
|
|
|
@ -20,40 +20,38 @@
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/*
|
/**
|
||||||
|
* Based on u8g_com_std_sw_spi.c
|
||||||
adapted from u8g_com_std_sw_spi.c
|
*
|
||||||
|
* Universal 8bit Graphics Library
|
||||||
Universal 8bit Graphics Library
|
*
|
||||||
|
* Copyright (c) 2015, olikraus@gmail.com
|
||||||
Copyright (c) 2015, olikraus@gmail.com
|
* All rights reserved.
|
||||||
All rights reserved.
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
Redistribution and use in source and binary forms, with or without modification,
|
* are permitted provided that the following conditions are met:
|
||||||
are permitted provided that the following conditions are met:
|
*
|
||||||
|
* * Redistributions of source code must retain the above copyright notice, this list
|
||||||
* Redistributions of source code must retain the above copyright notice, this list
|
* of conditions and the following disclaimer.
|
||||||
of conditions and the following disclaimer.
|
*
|
||||||
|
* * Redistributions in binary form must reproduce the above copyright notice, this
|
||||||
* Redistributions in binary form must reproduce the above copyright notice, this
|
* list of conditions and the following disclaimer in the documentation and/or other
|
||||||
list of conditions and the following disclaimer in the documentation and/or other
|
* materials provided with the distribution.
|
||||||
materials provided with the distribution.
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
||||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
||||||
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||||
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||||
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
||||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
*/
|
||||||
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifdef TARGET_LPC1768
|
#ifdef TARGET_LPC1768
|
||||||
|
|
||||||
|
@ -64,15 +62,12 @@
|
||||||
|
|
||||||
static uint8_t SPI_speed = 0;
|
static uint8_t SPI_speed = 0;
|
||||||
|
|
||||||
static void u8g_sw_spi_HAL_LPC1768_shift_out(uint8_t dataPin, uint8_t clockPin, uint8_t val)
|
static void u8g_sw_spi_HAL_LPC1768_shift_out(uint8_t dataPin, uint8_t clockPin, uint8_t val) {
|
||||||
{
|
|
||||||
swSpiTransfer(val, SPI_speed, clockPin, -1, dataPin);
|
swSpiTransfer(val, SPI_speed, clockPin, -1, dataPin);
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t u8g_com_HAL_LPC1768_sw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr)
|
uint8_t u8g_com_HAL_LPC1768_sw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr) {
|
||||||
{
|
switch(msg) {
|
||||||
switch(msg)
|
|
||||||
{
|
|
||||||
case U8G_COM_MSG_INIT:
|
case U8G_COM_MSG_INIT:
|
||||||
u8g_SetPIOutput(u8g, U8G_PI_SCK);
|
u8g_SetPIOutput(u8g, U8G_PI_SCK);
|
||||||
u8g_SetPIOutput(u8g, U8G_PI_MOSI);
|
u8g_SetPIOutput(u8g, U8G_PI_MOSI);
|
||||||
|
|
|
@ -513,7 +513,7 @@
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
const float cvf = parser.value_float();
|
const float cvf = parser.value_float();
|
||||||
switch((int)truncf(cvf * 10.0) - 30) { // 3.1 -> 1
|
switch ((int)truncf(cvf * 10.0) - 30) { // 3.1 -> 1
|
||||||
#if ENABLED(UBL_G29_P31)
|
#if ENABLED(UBL_G29_P31)
|
||||||
case 1: {
|
case 1: {
|
||||||
|
|
||||||
|
|
|
@ -314,7 +314,7 @@ void _tmc_say_sgt(const TMC_AxisEnum axis, const int8_t sgt) {
|
||||||
|
|
||||||
#if ENABLED(HAVE_TMC2130)
|
#if ENABLED(HAVE_TMC2130)
|
||||||
static void tmc_status(TMC2130Stepper &st, const TMC_debug_enum i) {
|
static void tmc_status(TMC2130Stepper &st, const TMC_debug_enum i) {
|
||||||
switch(i) {
|
switch (i) {
|
||||||
case TMC_PWM_SCALE: SERIAL_PRINT(st.PWM_SCALE(), DEC); break;
|
case TMC_PWM_SCALE: SERIAL_PRINT(st.PWM_SCALE(), DEC); break;
|
||||||
case TMC_TSTEP: SERIAL_ECHO(st.TSTEP()); break;
|
case TMC_TSTEP: SERIAL_ECHO(st.TSTEP()); break;
|
||||||
case TMC_SGT: SERIAL_PRINT(st.sgt(), DEC); break;
|
case TMC_SGT: SERIAL_PRINT(st.sgt(), DEC); break;
|
||||||
|
@ -323,7 +323,7 @@ void _tmc_say_sgt(const TMC_AxisEnum axis, const int8_t sgt) {
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
static void tmc_parse_drv_status(TMC2130Stepper &st, const TMC_drv_status_enum i) {
|
static void tmc_parse_drv_status(TMC2130Stepper &st, const TMC_drv_status_enum i) {
|
||||||
switch(i) {
|
switch (i) {
|
||||||
case TMC_STALLGUARD: if (st.stallguard()) SERIAL_CHAR('X'); break;
|
case TMC_STALLGUARD: if (st.stallguard()) SERIAL_CHAR('X'); break;
|
||||||
case TMC_SG_RESULT: SERIAL_PRINT(st.sg_result(), DEC); break;
|
case TMC_SG_RESULT: SERIAL_PRINT(st.sg_result(), DEC); break;
|
||||||
case TMC_FSACTIVE: if (st.fsactive()) SERIAL_CHAR('X'); break;
|
case TMC_FSACTIVE: if (st.fsactive()) SERIAL_CHAR('X'); break;
|
||||||
|
@ -333,7 +333,7 @@ void _tmc_say_sgt(const TMC_AxisEnum axis, const int8_t sgt) {
|
||||||
#endif
|
#endif
|
||||||
#if ENABLED(HAVE_TMC2208)
|
#if ENABLED(HAVE_TMC2208)
|
||||||
static void tmc_status(TMC2208Stepper &st, const TMC_debug_enum i) {
|
static void tmc_status(TMC2208Stepper &st, const TMC_debug_enum i) {
|
||||||
switch(i) {
|
switch (i) {
|
||||||
case TMC_TSTEP: { uint32_t data = 0; st.TSTEP(&data); SERIAL_PROTOCOL(data); break; }
|
case TMC_TSTEP: { uint32_t data = 0; st.TSTEP(&data); SERIAL_PROTOCOL(data); break; }
|
||||||
case TMC_PWM_SCALE: SERIAL_PRINT(st.pwm_scale_sum(), DEC); break;
|
case TMC_PWM_SCALE: SERIAL_PRINT(st.pwm_scale_sum(), DEC); break;
|
||||||
case TMC_STEALTHCHOP: serialprintPGM(st.stealth() ? PSTR("true") : PSTR("false")); break;
|
case TMC_STEALTHCHOP: serialprintPGM(st.stealth() ? PSTR("true") : PSTR("false")); break;
|
||||||
|
@ -343,7 +343,7 @@ void _tmc_say_sgt(const TMC_AxisEnum axis, const int8_t sgt) {
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
static void tmc_parse_drv_status(TMC2208Stepper &st, const TMC_drv_status_enum i) {
|
static void tmc_parse_drv_status(TMC2208Stepper &st, const TMC_drv_status_enum i) {
|
||||||
switch(i) {
|
switch (i) {
|
||||||
case TMC_T157: if (st.t157()) SERIAL_CHAR('X'); break;
|
case TMC_T157: if (st.t157()) SERIAL_CHAR('X'); break;
|
||||||
case TMC_T150: if (st.t150()) SERIAL_CHAR('X'); break;
|
case TMC_T150: if (st.t150()) SERIAL_CHAR('X'); break;
|
||||||
case TMC_T143: if (st.t143()) SERIAL_CHAR('X'); break;
|
case TMC_T143: if (st.t143()) SERIAL_CHAR('X'); break;
|
||||||
|
@ -356,7 +356,7 @@ void _tmc_say_sgt(const TMC_AxisEnum axis, const int8_t sgt) {
|
||||||
template <typename TMC>
|
template <typename TMC>
|
||||||
static void tmc_status(TMC &st, const TMC_AxisEnum axis, const TMC_debug_enum i, const float spmm) {
|
static void tmc_status(TMC &st, const TMC_AxisEnum axis, const TMC_debug_enum i, const float spmm) {
|
||||||
SERIAL_ECHO('\t');
|
SERIAL_ECHO('\t');
|
||||||
switch(i) {
|
switch (i) {
|
||||||
case TMC_CODES: _tmc_say_axis(axis); break;
|
case TMC_CODES: _tmc_say_axis(axis); break;
|
||||||
case TMC_ENABLED: serialprintPGM(st.isEnabled() ? PSTR("true") : PSTR("false")); break;
|
case TMC_ENABLED: serialprintPGM(st.isEnabled() ? PSTR("true") : PSTR("false")); break;
|
||||||
case TMC_CURRENT: SERIAL_ECHO(st.getCurrent()); break;
|
case TMC_CURRENT: SERIAL_ECHO(st.getCurrent()); break;
|
||||||
|
@ -401,7 +401,7 @@ void _tmc_say_sgt(const TMC_AxisEnum axis, const int8_t sgt) {
|
||||||
template <typename TMC>
|
template <typename TMC>
|
||||||
static void tmc_parse_drv_status(TMC &st, const TMC_AxisEnum axis, const TMC_drv_status_enum i) {
|
static void tmc_parse_drv_status(TMC &st, const TMC_AxisEnum axis, const TMC_drv_status_enum i) {
|
||||||
SERIAL_CHAR('\t');
|
SERIAL_CHAR('\t');
|
||||||
switch(i) {
|
switch (i) {
|
||||||
case TMC_DRV_CODES: _tmc_say_axis(axis); break;
|
case TMC_DRV_CODES: _tmc_say_axis(axis); break;
|
||||||
case TMC_STST: if (st.stst()) SERIAL_CHAR('X'); break;
|
case TMC_STST: if (st.stst()) SERIAL_CHAR('X'); break;
|
||||||
case TMC_OLB: if (st.olb()) SERIAL_CHAR('X'); break;
|
case TMC_OLB: if (st.olb()) SERIAL_CHAR('X'); break;
|
||||||
|
|
|
@ -20,42 +20,38 @@
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
/*
|
* Based on u8g_dev_ssd1306_128x64.c
|
||||||
|
*
|
||||||
u8g_dev_ssd1306_128x64.c
|
* Universal 8bit Graphics Library
|
||||||
|
*
|
||||||
Universal 8bit Graphics Library
|
* Copyright (c) 2015, olikraus@gmail.com
|
||||||
|
* All rights reserved.
|
||||||
Copyright (c) 2011, olikraus@gmail.com
|
*
|
||||||
All rights reserved.
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
* are permitted provided that the following conditions are met:
|
||||||
Redistribution and use in source and binary forms, with or without modification,
|
*
|
||||||
are permitted provided that the following conditions are met:
|
* * Redistributions of source code must retain the above copyright notice, this list
|
||||||
|
* of conditions and the following disclaimer.
|
||||||
* Redistributions of source code must retain the above copyright notice, this list
|
*
|
||||||
of conditions and the following disclaimer.
|
* * Redistributions in binary form must reproduce the above copyright notice, this
|
||||||
|
* list of conditions and the following disclaimer in the documentation and/or other
|
||||||
* Redistributions in binary form must reproduce the above copyright notice, this
|
* materials provided with the distribution.
|
||||||
list of conditions and the following disclaimer in the documentation and/or other
|
*
|
||||||
materials provided with the distribution.
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
||||||
|
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
||||||
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||||
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||||
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
||||||
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
*/
|
||||||
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
|
|
||||||
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* These routines are meant for two wire I2C interfaces.
|
* These routines are meant for two wire I2C interfaces.
|
||||||
|
@ -85,43 +81,38 @@ uint8_t u8g_WriteEscSeqP_2_wire(u8g_t *u8g, u8g_dev_t *dev, const uint8_t *esc_s
|
||||||
// The sh1106 is compatible to the ssd1306, but is 132x64. 128x64 display area is centered within
|
// The sh1106 is compatible to the ssd1306, but is 132x64. 128x64 display area is centered within
|
||||||
// the 132x64.
|
// the 132x64.
|
||||||
|
|
||||||
|
|
||||||
static const uint8_t u8g_dev_sh1106_128x64_data_start_2_wire[] PROGMEM = {
|
static const uint8_t u8g_dev_sh1106_128x64_data_start_2_wire[] PROGMEM = {
|
||||||
0x010, // set upper 4 bit of the col adr to 0
|
0x010, // set upper 4 bit of the col adr to 0
|
||||||
0x002, // set lower 4 bit of the col adr to 2 (centered display with ssd1306)
|
0x002, // set lower 4 bit of the col adr to 2 (centered display with ssd1306)
|
||||||
U8G_ESC_END // end of sequence
|
U8G_ESC_END // end of sequence
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
static const uint8_t u8g_dev_sh1106_128x64_init_seq_2_wire[] PROGMEM = {
|
static const uint8_t u8g_dev_sh1106_128x64_init_seq_2_wire[] PROGMEM = {
|
||||||
U8G_ESC_ADR(0), // initiate command mode
|
U8G_ESC_ADR(0), // initiate command mode
|
||||||
0x0ae, /* display off, sleep mode */
|
0x0AE, // display off, sleep mode
|
||||||
0x0a8, 0x03f, /* mux ratio */
|
0x0A8, 0x03F, // mux ratio
|
||||||
0x0d3, 0x00, /* display offset */
|
0x0D3, 0x00, // display offset
|
||||||
0x040, /* start line */
|
0x040, // start line
|
||||||
0x0a1, /* segment remap a0/a1*/
|
0x0A1, // segment remap a0/a1
|
||||||
0x0c8, /* c0: scan dir normal, c8: reverse */
|
0x0C8, // c0: scan dir normal, c8: reverse
|
||||||
0x0da, 0x012, /* com pin HW config, sequential com pin config (bit 4), disable left/right remap (bit 5) */
|
0x0DA, 0x012, // com pin HW config, sequential com pin config (bit 4), disable left/right remap (bit 5)
|
||||||
0x081, 0x0cf, /* [2] set contrast control */
|
0x081, 0x0CF, // [2] set contrast control
|
||||||
0x020, 0x002, /* 2012-05-27: page addressing mode */
|
0x020, 0x002, // 2012-05-27: page addressing mode
|
||||||
0x21, 2, 0x81, // set column range from 0 through 131
|
0x21, 2, 0x81, // set column range from 0 through 131
|
||||||
0x22, 0, 7, // set page range from 0 through 7
|
0x22, 0, 7, // set page range from 0 through 7
|
||||||
0x0d9, 0x0f1, /* [2] pre-charge period 0x022/f1*/
|
0x0D9, 0x0F1, // [2] pre-charge period 0x022/f1
|
||||||
0x0db, 0x040, /* vcomh deselect level */
|
0x0DB, 0x040, // vcomh deselect level
|
||||||
0x0a4, /* output ram to display */
|
0x0A4, // output ram to display
|
||||||
0x0a6, /* none inverted normal display mode */
|
0x0A6, // none inverted normal display mode
|
||||||
0x0d5, 0x080, /* clock divide ratio (0x00=1) and oscillator frequency (0x8) */
|
0x0D5, 0x080, // clock divide ratio (0x00=1) and oscillator frequency (0x8)
|
||||||
0x08d, 0x014, /* [2] charge pump setting (p62): 0x014 enable, 0x010 disable */
|
0x08D, 0x014, // [2] charge pump setting (p62): 0x014 enable, 0x010 disable
|
||||||
0x02e, /* 2012-05-27: Deactivate scroll */
|
0x02E, // 2012-05-27: Deactivate scroll
|
||||||
0x0af, /* display on */
|
0x0AF, // display on
|
||||||
U8G_ESC_END /* end of sequence */
|
U8G_ESC_END // end of sequence
|
||||||
};
|
};
|
||||||
|
|
||||||
|
uint8_t u8g_dev_sh1106_128x64_2x_2_wire_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) {
|
||||||
uint8_t u8g_dev_sh1106_128x64_2x_2_wire_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
|
switch(msg) {
|
||||||
{
|
|
||||||
switch(msg)
|
|
||||||
{
|
|
||||||
case U8G_DEV_MSG_INIT:
|
case U8G_DEV_MSG_INIT:
|
||||||
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_300NS);
|
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_300NS);
|
||||||
u8g_WriteEscSeqP_2_wire(u8g, dev, u8g_dev_sh1106_128x64_init_seq_2_wire);
|
u8g_WriteEscSeqP_2_wire(u8g, dev, u8g_dev_sh1106_128x64_init_seq_2_wire);
|
||||||
|
@ -152,7 +143,6 @@ uint8_t u8g_dev_sh1106_128x64_2x_2_wire_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t m
|
||||||
return u8g_dev_pb16v1_base_fn(u8g, dev, msg, arg);
|
return u8g_dev_pb16v1_base_fn(u8g, dev, msg, arg);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
uint8_t u8g_dev_sh1106_128x64_2x_i2c_2_wire_buf[WIDTH*2] U8G_NOCOMMON ;
|
uint8_t u8g_dev_sh1106_128x64_2x_i2c_2_wire_buf[WIDTH*2] U8G_NOCOMMON ;
|
||||||
u8g_pb_t u8g_dev_sh1106_128x64_2x_i2c_2_wire_pb = { {16, HEIGHT, 0, 0, 0}, WIDTH, u8g_dev_sh1106_128x64_2x_i2c_2_wire_buf};
|
u8g_pb_t u8g_dev_sh1106_128x64_2x_i2c_2_wire_pb = { {16, HEIGHT, 0, 0, 0}, WIDTH, u8g_dev_sh1106_128x64_2x_i2c_2_wire_buf};
|
||||||
u8g_dev_t u8g_dev_sh1106_128x64_2x_i2c_2_wire = { u8g_dev_sh1106_128x64_2x_2_wire_fn, &u8g_dev_sh1106_128x64_2x_i2c_2_wire_pb, U8G_COM_SSD_I2C_HAL };
|
u8g_dev_t u8g_dev_sh1106_128x64_2x_i2c_2_wire = { u8g_dev_sh1106_128x64_2x_2_wire_fn, &u8g_dev_sh1106_128x64_2x_i2c_2_wire_pb, U8G_COM_SSD_I2C_HAL };
|
||||||
|
@ -160,41 +150,37 @@ u8g_dev_t u8g_dev_sh1106_128x64_2x_i2c_2_wire = { u8g_dev_sh1106_128x64_2x_2_wir
|
||||||
/////////////////////////////////////////////////////////////////////////////////////////////
|
/////////////////////////////////////////////////////////////////////////////////////////////
|
||||||
|
|
||||||
static const uint8_t u8g_dev_ssd1306_128x64_data_start_2_wire[] PROGMEM = {
|
static const uint8_t u8g_dev_ssd1306_128x64_data_start_2_wire[] PROGMEM = {
|
||||||
0x010, // set upper 4 bit of the col adr to 0
|
0x010, // set upper 4 bit of the col adr to 0
|
||||||
0x000, // set lower 4 bit of the col adr to 0
|
0x000, // set lower 4 bit of the col adr to 0
|
||||||
U8G_ESC_END // end of sequence
|
U8G_ESC_END // end of sequence
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
static const uint8_t u8g_dev_ssd1306_128x64_init_seq_2_wire[] PROGMEM = {
|
static const uint8_t u8g_dev_ssd1306_128x64_init_seq_2_wire[] PROGMEM = {
|
||||||
U8G_ESC_ADR(0), // initiate command mode
|
U8G_ESC_ADR(0), // initiate command mode
|
||||||
0x0ae, /* display off, sleep mode */
|
0x0AE, // display off, sleep mode
|
||||||
0x0a8, 0x03f, /* mux ratio */
|
0x0A8, 0x03F, // mux ratio
|
||||||
0x0d3, 0x00, /* display offset */
|
0x0D3, 0x00, // display offset
|
||||||
0x040, /* start line */
|
0x040, // start line
|
||||||
0x0a1, /* segment remap a0/a1*/
|
0x0A1, // segment remap a0/a1
|
||||||
0x0c8, /* c0: scan dir normal, c8: reverse */
|
0x0C8, // c0: scan dir normal, c8: reverse
|
||||||
0x0da, 0x012, /* com pin HW config, sequential com pin config (bit 4), disable left/right remap (bit 5) */
|
0x0DA, 0x012, // com pin HW config, sequential com pin config (bit 4), disable left/right remap (bit 5)
|
||||||
0x081, 0x0cf, /* [2] set contrast control */
|
0x081, 0x0CF, // [2] set contrast control
|
||||||
0x020, 0x002, /* 2012-05-27: page addressing mode */
|
0x020, 0x002, // 2012-05-27: page addressing mode
|
||||||
0x21, 0, 0x7f, // set column range from 0 through 127
|
0x21, 0, 0x7F, // set column range from 0 through 127
|
||||||
0x22, 0, 7, // set page range from 0 through 7
|
0x22, 0, 7, // set page range from 0 through 7
|
||||||
0x0d9, 0x0f1, /* [2] pre-charge period 0x022/f1*/
|
0x0D9, 0x0F1, // [2] pre-charge period 0x022/f1
|
||||||
0x0db, 0x040, /* vcomh deselect level */
|
0x0DB, 0x040, // vcomh deselect level
|
||||||
0x0a4, /* output ram to display */
|
0x0A4, // output ram to display
|
||||||
0x0a6, /* none inverted normal display mode */
|
0x0A6, // none inverted normal display mode
|
||||||
0x0d5, 0x080, /* clock divide ratio (0x00=1) and oscillator frequency (0x8) */
|
0x0D5, 0x080, // clock divide ratio (0x00=1) and oscillator frequency (0x8)
|
||||||
0x08d, 0x014, /* [2] charge pump setting (p62): 0x014 enable, 0x010 disable */
|
0x08D, 0x014, // [2] charge pump setting (p62): 0x014 enable, 0x010 disable
|
||||||
0x02e, /* 2012-05-27: Deactivate scroll */
|
0x02E, // 2012-05-27: Deactivate scroll
|
||||||
0x0af, /* display on */
|
0x0AF, // display on
|
||||||
U8G_ESC_END /* end of sequence */
|
U8G_ESC_END // end of sequence
|
||||||
};
|
};
|
||||||
|
|
||||||
|
uint8_t u8g_dev_ssd1306_128x64_2x_2_wire_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) {
|
||||||
uint8_t u8g_dev_ssd1306_128x64_2x_2_wire_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
|
switch(msg) {
|
||||||
{
|
|
||||||
switch(msg)
|
|
||||||
{
|
|
||||||
case U8G_DEV_MSG_INIT:
|
case U8G_DEV_MSG_INIT:
|
||||||
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_300NS);
|
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_300NS);
|
||||||
u8g_WriteEscSeqP_2_wire(u8g, dev, u8g_dev_ssd1306_128x64_init_seq_2_wire);
|
u8g_WriteEscSeqP_2_wire(u8g, dev, u8g_dev_ssd1306_128x64_init_seq_2_wire);
|
||||||
|
@ -238,54 +224,42 @@ u8g_dev_t u8g_dev_ssd1306_128x64_2x_i2c_2_wire = { u8g_dev_ssd1306_128x64_2x_2_w
|
||||||
|
|
||||||
#define I2C_CMD_MODE 0x080
|
#define I2C_CMD_MODE 0x080
|
||||||
|
|
||||||
uint8_t u8g_WriteEscSeqP_2_wire(u8g_t *u8g, u8g_dev_t *dev, const uint8_t *esc_seq)
|
uint8_t u8g_WriteEscSeqP_2_wire(u8g_t *u8g, u8g_dev_t *dev, const uint8_t *esc_seq) {
|
||||||
{
|
|
||||||
uint8_t is_escape = 0;
|
uint8_t is_escape = 0;
|
||||||
uint8_t value;
|
uint8_t value;
|
||||||
for(;;)
|
for(;;) {
|
||||||
{
|
|
||||||
value = u8g_pgm_read(esc_seq);
|
value = u8g_pgm_read(esc_seq);
|
||||||
if ( is_escape == 0 )
|
if (is_escape == 0) {
|
||||||
{
|
if (value != 255) {
|
||||||
if ( value != 255 )
|
if (u8g_WriteByte(u8g, dev, value) == 0 )
|
||||||
{
|
|
||||||
if ( u8g_WriteByte(u8g, dev, value) == 0 )
|
|
||||||
return 0;
|
return 0;
|
||||||
if ( u8g_WriteByte(u8g, dev, I2C_CMD_MODE) == 0 )
|
if (u8g_WriteByte(u8g, dev, I2C_CMD_MODE) == 0 )
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
else
|
else {
|
||||||
{
|
|
||||||
is_escape = 1;
|
is_escape = 1;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
else
|
else {
|
||||||
{
|
if (value == 255) {
|
||||||
if ( value == 255 )
|
if (u8g_WriteByte(u8g, dev, value) == 0 )
|
||||||
{
|
|
||||||
if ( u8g_WriteByte(u8g, dev, value) == 0 )
|
|
||||||
return 0;
|
return 0;
|
||||||
if ( u8g_WriteByte(u8g, dev, I2C_CMD_MODE) == 0 )
|
if (u8g_WriteByte(u8g, dev, I2C_CMD_MODE) == 0 )
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
else if ( value == 254 )
|
else if (value == 254) {
|
||||||
{
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
else if ( value >= 0x0f0 )
|
else if (value >= 0x0f0) {
|
||||||
{
|
|
||||||
/* not yet used, do nothing */
|
/* not yet used, do nothing */
|
||||||
}
|
}
|
||||||
else if ( value >= 0xe0 )
|
else if (value >= 0xe0 ) {
|
||||||
{
|
|
||||||
u8g_SetAddress(u8g, dev, value & 0x0f);
|
u8g_SetAddress(u8g, dev, value & 0x0f);
|
||||||
}
|
}
|
||||||
else if ( value >= 0xd0 )
|
else if (value >= 0xd0) {
|
||||||
{
|
|
||||||
u8g_SetChipSelect(u8g, dev, value & 0x0f);
|
u8g_SetChipSelect(u8g, dev, value & 0x0f);
|
||||||
}
|
}
|
||||||
else if ( value >= 0xc0 )
|
else if (value >= 0xc0) {
|
||||||
{
|
|
||||||
u8g_SetResetLow(u8g, dev);
|
u8g_SetResetLow(u8g, dev);
|
||||||
value &= 0x0f;
|
value &= 0x0f;
|
||||||
value <<= 4;
|
value <<= 4;
|
||||||
|
@ -294,13 +268,10 @@ uint8_t u8g_WriteEscSeqP_2_wire(u8g_t *u8g, u8g_dev_t *dev, const uint8_t *esc_s
|
||||||
u8g_SetResetHigh(u8g, dev);
|
u8g_SetResetHigh(u8g, dev);
|
||||||
u8g_Delay(value);
|
u8g_Delay(value);
|
||||||
}
|
}
|
||||||
else if ( value >= 0xbe )
|
else if (value >= 0xbe) { /* not yet implemented */
|
||||||
{
|
|
||||||
/* not yet implemented */
|
|
||||||
/* u8g_SetVCC(u8g, dev, value & 0x01); */
|
/* u8g_SetVCC(u8g, dev, value & 0x01); */
|
||||||
}
|
}
|
||||||
else if ( value <= 127 )
|
else if (value <= 127) {
|
||||||
{
|
|
||||||
u8g_Delay(value);
|
u8g_Delay(value);
|
||||||
}
|
}
|
||||||
is_escape = 0;
|
is_escape = 0;
|
||||||
|
|
|
@ -20,42 +20,38 @@
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
/*
|
* u8g_dev_st7565_64128n_HAL.c (Displaytech)
|
||||||
|
*
|
||||||
u8g_dev_st7565_64128n_HAL.c (Displaytech)
|
* Universal 8bit Graphics Library
|
||||||
|
*
|
||||||
Universal 8bit Graphics Library
|
* Copyright (c) 2011, olikraus@gmail.com
|
||||||
|
* All rights reserved.
|
||||||
Copyright (c) 2011, olikraus@gmail.com
|
*
|
||||||
All rights reserved.
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
* are permitted provided that the following conditions are met:
|
||||||
Redistribution and use in source and binary forms, with or without modification,
|
*
|
||||||
are permitted provided that the following conditions are met:
|
* * Redistributions of source code must retain the above copyright notice, this list
|
||||||
|
* of conditions and the following disclaimer.
|
||||||
* Redistributions of source code must retain the above copyright notice, this list
|
*
|
||||||
of conditions and the following disclaimer.
|
* * Redistributions in binary form must reproduce the above copyright notice, this
|
||||||
|
* list of conditions and the following disclaimer in the documentation and/or other
|
||||||
* Redistributions in binary form must reproduce the above copyright notice, this
|
* materials provided with the distribution.
|
||||||
list of conditions and the following disclaimer in the documentation and/or other
|
*
|
||||||
materials provided with the distribution.
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
||||||
|
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
||||||
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||||
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||||
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
||||||
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
*/
|
||||||
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
|
|
||||||
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "../../inc/MarlinConfig.h"
|
#include "../../inc/MarlinConfig.h"
|
||||||
|
|
||||||
|
@ -71,78 +67,76 @@
|
||||||
|
|
||||||
/* init sequence from https://github.com/adafruit/ST7565-LCD/blob/master/ST7565/ST7565.cpp */
|
/* init sequence from https://github.com/adafruit/ST7565-LCD/blob/master/ST7565/ST7565.cpp */
|
||||||
static const uint8_t u8g_dev_st7565_64128n_HAL_init_seq[] PROGMEM = {
|
static const uint8_t u8g_dev_st7565_64128n_HAL_init_seq[] PROGMEM = {
|
||||||
U8G_ESC_CS(0), /* disable chip */
|
U8G_ESC_CS(0), // disable chip
|
||||||
U8G_ESC_ADR(0), /* instruction mode */
|
U8G_ESC_ADR(0), // instruction mode
|
||||||
U8G_ESC_CS(1), /* enable chip */
|
U8G_ESC_CS(1), // enable chip
|
||||||
U8G_ESC_RST(15), /* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
|
U8G_ESC_RST(15), // do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
|
||||||
|
|
||||||
0x0A2, /* 0x0a2: LCD bias 1/9 (according to Displaytech 64128N datasheet) */
|
0x0A2, // 0x0a2: LCD bias 1/9 (according to Displaytech 64128N datasheet)
|
||||||
0x0A0, /* Normal ADC Select (according to Displaytech 64128N datasheet) */
|
0x0A0, // Normal ADC Select (according to Displaytech 64128N datasheet)
|
||||||
|
|
||||||
0x0c8, /* common output mode: set scan direction normal operation/SHL Select, 0x0c0 --> SHL = 0, normal, 0x0c8 --> SHL = 1 */
|
0x0c8, // common output mode: set scan direction normal operation/SHL Select, 0x0c0 --> SHL = 0, normal, 0x0c8 --> SHL = 1
|
||||||
0x040, /* Display start line for Displaytech 64128N */
|
0x040, // Display start line for Displaytech 64128N
|
||||||
|
|
||||||
0x028 | 0x04, /* power control: turn on voltage converter */
|
0x028 | 0x04, // power control: turn on voltage converter
|
||||||
U8G_ESC_DLY(50), /* delay 50 ms */
|
U8G_ESC_DLY(50), // delay 50 ms
|
||||||
|
|
||||||
0x028 | 0x06, /* power control: turn on voltage regulator */
|
0x028 | 0x06, // power control: turn on voltage regulator
|
||||||
U8G_ESC_DLY(50), /* delay 50 ms */
|
U8G_ESC_DLY(50), // delay 50 ms
|
||||||
|
|
||||||
0x028 | 0x07, /* power control: turn on voltage follower */
|
0x028 | 0x07, // power control: turn on voltage follower
|
||||||
U8G_ESC_DLY(50), /* delay 50 ms */
|
U8G_ESC_DLY(50), // delay 50 ms
|
||||||
|
|
||||||
0x010, /* Set V0 voltage resistor ratio. Setting for controlling brightness of Displaytech 64128N */
|
0x010, // Set V0 voltage resistor ratio. Setting for controlling brightness of Displaytech 64128N
|
||||||
|
|
||||||
0x0a6, /* display normal, bit val 0: LCD pixel off. */
|
0x0a6, // display normal, bit val 0: LCD pixel off.
|
||||||
|
|
||||||
0x081, /* set contrast */
|
0x081, // set contrast
|
||||||
0x01e, /* Contrast value. Setting for controlling brightness of Displaytech 64128N */
|
0x01e, // Contrast value. Setting for controlling brightness of Displaytech 64128N
|
||||||
|
|
||||||
|
|
||||||
0x0af, /* display on */
|
0x0af, // display on
|
||||||
|
|
||||||
U8G_ESC_DLY(100), /* delay 100 ms */
|
U8G_ESC_DLY(100), // delay 100 ms
|
||||||
0x0a5, /* display all points, ST7565 */
|
0x0a5, // display all points, ST7565
|
||||||
U8G_ESC_DLY(100), /* delay 100 ms */
|
U8G_ESC_DLY(100), // delay 100 ms
|
||||||
U8G_ESC_DLY(100), /* delay 100 ms */
|
U8G_ESC_DLY(100), // delay 100 ms
|
||||||
0x0a4, /* normal display */
|
0x0a4, // normal display
|
||||||
U8G_ESC_CS(0), /* disable chip */
|
U8G_ESC_CS(0), // disable chip
|
||||||
U8G_ESC_END /* end of sequence */
|
U8G_ESC_END // end of sequence
|
||||||
};
|
};
|
||||||
|
|
||||||
static const uint8_t u8g_dev_st7565_64128n_HAL_data_start[] PROGMEM = {
|
static const uint8_t u8g_dev_st7565_64128n_HAL_data_start[] PROGMEM = {
|
||||||
U8G_ESC_ADR(0), /* instruction mode */
|
U8G_ESC_ADR(0), // instruction mode
|
||||||
U8G_ESC_CS(1), /* enable chip */
|
U8G_ESC_CS(1), // enable chip
|
||||||
0x010, /* set upper 4 bit of the col adr to 0x10 */
|
0x010, // set upper 4 bit of the col adr to 0x10
|
||||||
0x000, /* set lower 4 bit of the col adr to 0x00. Changed for DisplayTech 64128N */
|
0x000, // set lower 4 bit of the col adr to 0x00. Changed for DisplayTech 64128N
|
||||||
U8G_ESC_END /* end of sequence */
|
U8G_ESC_END // end of sequence
|
||||||
};
|
};
|
||||||
|
|
||||||
static const uint8_t u8g_dev_st7565_64128n_HAL_sleep_on[] PROGMEM = {
|
static const uint8_t u8g_dev_st7565_64128n_HAL_sleep_on[] PROGMEM = {
|
||||||
U8G_ESC_ADR(0), /* instruction mode */
|
U8G_ESC_ADR(0), // instruction mode
|
||||||
U8G_ESC_CS(1), /* enable chip */
|
U8G_ESC_CS(1), // enable chip
|
||||||
0x0ac, /* static indicator off */
|
0x0ac, // static indicator off
|
||||||
0x000, /* indicator register set (not sure if this is required) */
|
0x000, // indicator register set (not sure if this is required)
|
||||||
0x0ae, /* display off */
|
0x0ae, // display off
|
||||||
0x0a5, /* all points on */
|
0x0a5, // all points on
|
||||||
U8G_ESC_CS(0), /* disable chip, bugfix 12 nov 2014 */
|
U8G_ESC_CS(0), // disable chip, bugfix 12 nov 2014
|
||||||
U8G_ESC_END /* end of sequence */
|
U8G_ESC_END // end of sequence
|
||||||
};
|
};
|
||||||
|
|
||||||
static const uint8_t u8g_dev_st7565_64128n_HAL_sleep_off[] PROGMEM = {
|
static const uint8_t u8g_dev_st7565_64128n_HAL_sleep_off[] PROGMEM = {
|
||||||
U8G_ESC_ADR(0), /* instruction mode */
|
U8G_ESC_ADR(0), // instruction mode
|
||||||
U8G_ESC_CS(1), /* enable chip */
|
U8G_ESC_CS(1), // enable chip
|
||||||
0x0a4, /* all points off */
|
0x0a4, // all points off
|
||||||
0x0af, /* display on */
|
0x0af, // display on
|
||||||
U8G_ESC_DLY(50), /* delay 50 ms */
|
U8G_ESC_DLY(50), // delay 50 ms
|
||||||
U8G_ESC_CS(0), /* disable chip, bugfix 12 nov 2014 */
|
U8G_ESC_CS(0), // disable chip, bugfix 12 nov 2014
|
||||||
U8G_ESC_END /* end of sequence */
|
U8G_ESC_END // end of sequence
|
||||||
};
|
};
|
||||||
|
|
||||||
uint8_t u8g_dev_st7565_64128n_HAL_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
|
uint8_t u8g_dev_st7565_64128n_HAL_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) {
|
||||||
{
|
switch(msg) {
|
||||||
switch(msg)
|
|
||||||
{
|
|
||||||
case U8G_DEV_MSG_INIT:
|
case U8G_DEV_MSG_INIT:
|
||||||
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
|
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
|
||||||
u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_64128n_HAL_init_seq);
|
u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_64128n_HAL_init_seq);
|
||||||
|
@ -176,10 +170,8 @@ uint8_t u8g_dev_st7565_64128n_HAL_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, vo
|
||||||
return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
|
return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t u8g_dev_st7565_64128n_HAL_2x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
|
uint8_t u8g_dev_st7565_64128n_HAL_2x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) {
|
||||||
{
|
switch(msg) {
|
||||||
switch(msg)
|
|
||||||
{
|
|
||||||
case U8G_DEV_MSG_INIT:
|
case U8G_DEV_MSG_INIT:
|
||||||
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
|
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
|
||||||
u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_64128n_HAL_init_seq);
|
u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_64128n_HAL_init_seq);
|
||||||
|
|
|
@ -20,41 +20,38 @@
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/*
|
/**
|
||||||
|
* u8g_dev_st7920_128x64_HAL.c
|
||||||
u8g_dev_st7920_128x64_HAL.c
|
*
|
||||||
|
* Universal 8bit Graphics Library
|
||||||
Universal 8bit Graphics Library
|
*
|
||||||
|
* Copyright (c) 2011, olikraus@gmail.com
|
||||||
Copyright (c) 2011, olikraus@gmail.com
|
* All rights reserved.
|
||||||
All rights reserved.
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
Redistribution and use in source and binary forms, with or without modification,
|
* are permitted provided that the following conditions are met:
|
||||||
are permitted provided that the following conditions are met:
|
*
|
||||||
|
* * Redistributions of source code must retain the above copyright notice, this list
|
||||||
* Redistributions of source code must retain the above copyright notice, this list
|
* of conditions and the following disclaimer.
|
||||||
of conditions and the following disclaimer.
|
*
|
||||||
|
* * Redistributions in binary form must reproduce the above copyright notice, this
|
||||||
* Redistributions in binary form must reproduce the above copyright notice, this
|
* list of conditions and the following disclaimer in the documentation and/or other
|
||||||
list of conditions and the following disclaimer in the documentation and/or other
|
* materials provided with the distribution.
|
||||||
materials provided with the distribution.
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
||||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
||||||
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||||
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||||
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
||||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
*/
|
||||||
|
|
||||||
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "../../inc/MarlinConfig.h"
|
#include "../../inc/MarlinConfig.h"
|
||||||
|
|
||||||
|
@ -68,25 +65,24 @@
|
||||||
#define HEIGHT 64
|
#define HEIGHT 64
|
||||||
#define PAGE_HEIGHT 8
|
#define PAGE_HEIGHT 8
|
||||||
|
|
||||||
|
|
||||||
/* init sequence from https://github.com/adafruit/ST7565-LCD/blob/master/ST7565/ST7565.cpp */
|
/* init sequence from https://github.com/adafruit/ST7565-LCD/blob/master/ST7565/ST7565.cpp */
|
||||||
static const uint8_t u8g_dev_st7920_128x64_HAL_init_seq[] PROGMEM = {
|
static const uint8_t u8g_dev_st7920_128x64_HAL_init_seq[] PROGMEM = {
|
||||||
U8G_ESC_CS(0), /* disable chip */
|
U8G_ESC_CS(0), // disable chip
|
||||||
U8G_ESC_ADR(0), /* instruction mode */
|
U8G_ESC_ADR(0), // instruction mode
|
||||||
U8G_ESC_RST(15), /* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
|
U8G_ESC_RST(15), // do reset low pulse with (15*16)+2 milliseconds (=maximum delay)
|
||||||
U8G_ESC_DLY(100), /* 8 Dez 2012: additional delay 100 ms because of reset*/
|
U8G_ESC_DLY(100), // 8 Dez 2012: additional delay 100 ms because of reset
|
||||||
U8G_ESC_CS(1), /* enable chip */
|
U8G_ESC_CS(1), // enable chip
|
||||||
U8G_ESC_DLY(50), /* delay 50 ms */
|
U8G_ESC_DLY(50), // delay 50 ms
|
||||||
|
|
||||||
0x038, /* 8 Bit interface (DL=1), basic instruction set (RE=0) */
|
0x038, // 8 Bit interface (DL=1), basic instruction set (RE=0)
|
||||||
0x00c, /* display on, cursor & blink off; 0x08: all off */
|
0x00c, // display on, cursor & blink off; 0x08: all off
|
||||||
0x006, /* Entry mode: Cursor move to right ,DDRAM address counter (AC) plus 1, no shift */
|
0x006, // Entry mode: Cursor move to right ,DDRAM address counter (AC) plus 1, no shift
|
||||||
0x002, /* disable scroll, enable CGRAM adress */
|
0x002, // disable scroll, enable CGRAM adress
|
||||||
0x001, /* clear RAM, needs 1.6 ms */
|
0x001, // clear RAM, needs 1.6 ms
|
||||||
U8G_ESC_DLY(100), /* delay 100 ms */
|
U8G_ESC_DLY(100), // delay 100 ms
|
||||||
|
|
||||||
U8G_ESC_CS(0), /* disable chip */
|
U8G_ESC_CS(0), // disable chip
|
||||||
U8G_ESC_END /* end of sequence */
|
U8G_ESC_END // end of sequence
|
||||||
};
|
};
|
||||||
|
|
||||||
void clear_graphics_DRAM(u8g_t *u8g, u8g_dev_t *dev){
|
void clear_graphics_DRAM(u8g_t *u8g, u8g_dev_t *dev){
|
||||||
|
@ -107,13 +103,10 @@ void clear_graphics_DRAM(u8g_t *u8g, u8g_dev_t *dev){
|
||||||
u8g_WriteByte(u8g, dev, 0x0C); //display on, cursor+blink off
|
u8g_WriteByte(u8g, dev, 0x0C); //display on, cursor+blink off
|
||||||
|
|
||||||
u8g_SetChipSelect(u8g, dev, 0);
|
u8g_SetChipSelect(u8g, dev, 0);
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t u8g_dev_st7920_128x64_HAL_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
|
uint8_t u8g_dev_st7920_128x64_HAL_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) {
|
||||||
{
|
switch(msg) {
|
||||||
switch(msg)
|
|
||||||
{
|
|
||||||
case U8G_DEV_MSG_INIT:
|
case U8G_DEV_MSG_INIT:
|
||||||
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
|
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
|
||||||
u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7920_128x64_HAL_init_seq);
|
u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7920_128x64_HAL_init_seq);
|
||||||
|
@ -122,46 +115,41 @@ uint8_t u8g_dev_st7920_128x64_HAL_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, vo
|
||||||
case U8G_DEV_MSG_STOP:
|
case U8G_DEV_MSG_STOP:
|
||||||
break;
|
break;
|
||||||
case U8G_DEV_MSG_PAGE_NEXT: {
|
case U8G_DEV_MSG_PAGE_NEXT: {
|
||||||
uint8_t y, i;
|
uint8_t y, i;
|
||||||
uint8_t *ptr;
|
uint8_t *ptr;
|
||||||
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
|
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
|
||||||
|
|
||||||
|
u8g_SetAddress(u8g, dev, 0); /* cmd mode */
|
||||||
|
u8g_SetChipSelect(u8g, dev, 1);
|
||||||
|
y = pb->p.page_y0;
|
||||||
|
ptr = (uint8_t *)pb->buf;
|
||||||
|
for (i = 0; i < 8; i ++) {
|
||||||
u8g_SetAddress(u8g, dev, 0); /* cmd mode */
|
u8g_SetAddress(u8g, dev, 0); /* cmd mode */
|
||||||
u8g_SetChipSelect(u8g, dev, 1);
|
u8g_WriteByte(u8g, dev, 0x03e ); /* enable extended mode */
|
||||||
y = pb->p.page_y0;
|
|
||||||
ptr = (uint8_t *)pb->buf;
|
|
||||||
for( i = 0; i < 8; i ++ )
|
|
||||||
{
|
|
||||||
u8g_SetAddress(u8g, dev, 0); /* cmd mode */
|
|
||||||
u8g_WriteByte(u8g, dev, 0x03e ); /* enable extended mode */
|
|
||||||
|
|
||||||
if ( y < 32 )
|
if (y < 32) {
|
||||||
{
|
u8g_WriteByte(u8g, dev, 0x080 | y ); /* y pos */
|
||||||
u8g_WriteByte(u8g, dev, 0x080 | y ); /* y pos */
|
u8g_WriteByte(u8g, dev, 0x080 ); /* set x pos to 0*/
|
||||||
u8g_WriteByte(u8g, dev, 0x080 ); /* set x pos to 0*/
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
u8g_WriteByte(u8g, dev, 0x080 | (y-32) ); /* y pos */
|
|
||||||
u8g_WriteByte(u8g, dev, 0x080 | 8); /* set x pos to 64*/
|
|
||||||
}
|
|
||||||
|
|
||||||
u8g_SetAddress(u8g, dev, 1); /* data mode */
|
|
||||||
u8g_WriteSequence(u8g, dev, WIDTH/8, ptr);
|
|
||||||
ptr += WIDTH/8;
|
|
||||||
y++;
|
|
||||||
}
|
}
|
||||||
u8g_SetChipSelect(u8g, dev, 0);
|
else {
|
||||||
|
u8g_WriteByte(u8g, dev, 0x080 | (y-32) ); /* y pos */
|
||||||
|
u8g_WriteByte(u8g, dev, 0x080 | 8); /* set x pos to 64*/
|
||||||
|
}
|
||||||
|
|
||||||
|
u8g_SetAddress(u8g, dev, 1); /* data mode */
|
||||||
|
u8g_WriteSequence(u8g, dev, WIDTH/8, ptr);
|
||||||
|
ptr += WIDTH/8;
|
||||||
|
y++;
|
||||||
}
|
}
|
||||||
break;
|
u8g_SetChipSelect(u8g, dev, 0);
|
||||||
|
}
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
return u8g_dev_pb8h1_base_fn(u8g, dev, msg, arg);
|
return u8g_dev_pb8h1_base_fn(u8g, dev, msg, arg);
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t u8g_dev_st7920_128x64_HAL_4x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
|
uint8_t u8g_dev_st7920_128x64_HAL_4x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) {
|
||||||
{
|
switch(msg) {
|
||||||
switch(msg)
|
|
||||||
{
|
|
||||||
case U8G_DEV_MSG_INIT:
|
case U8G_DEV_MSG_INIT:
|
||||||
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
|
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
|
||||||
u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7920_128x64_HAL_init_seq);
|
u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7920_128x64_HAL_init_seq);
|
||||||
|
@ -172,38 +160,35 @@ uint8_t u8g_dev_st7920_128x64_HAL_4x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg,
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case U8G_DEV_MSG_PAGE_NEXT: {
|
case U8G_DEV_MSG_PAGE_NEXT: {
|
||||||
uint8_t y, i;
|
uint8_t y, i;
|
||||||
uint8_t *ptr;
|
uint8_t *ptr;
|
||||||
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
|
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
|
||||||
|
|
||||||
|
u8g_SetAddress(u8g, dev, 0); /* cmd mode */
|
||||||
|
u8g_SetChipSelect(u8g, dev, 1);
|
||||||
|
y = pb->p.page_y0;
|
||||||
|
ptr = (uint8_t *)pb->buf;
|
||||||
|
for (i = 0; i < 32; i ++) {
|
||||||
u8g_SetAddress(u8g, dev, 0); /* cmd mode */
|
u8g_SetAddress(u8g, dev, 0); /* cmd mode */
|
||||||
u8g_SetChipSelect(u8g, dev, 1);
|
u8g_WriteByte(u8g, dev, 0x03e ); /* enable extended mode */
|
||||||
y = pb->p.page_y0;
|
|
||||||
ptr = (uint8_t *)pb->buf;
|
|
||||||
for( i = 0; i < 32; i ++ )
|
|
||||||
{
|
|
||||||
u8g_SetAddress(u8g, dev, 0); /* cmd mode */
|
|
||||||
u8g_WriteByte(u8g, dev, 0x03e ); /* enable extended mode */
|
|
||||||
|
|
||||||
if ( y < 32 )
|
if (y < 32) {
|
||||||
{
|
u8g_WriteByte(u8g, dev, 0x080 | y ); /* y pos */
|
||||||
u8g_WriteByte(u8g, dev, 0x080 | y ); /* y pos */
|
u8g_WriteByte(u8g, dev, 0x080 ); /* set x pos to 0*/
|
||||||
u8g_WriteByte(u8g, dev, 0x080 ); /* set x pos to 0*/
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
u8g_WriteByte(u8g, dev, 0x080 | (y-32) ); /* y pos */
|
|
||||||
u8g_WriteByte(u8g, dev, 0x080 | 8); /* set x pos to 64*/
|
|
||||||
}
|
|
||||||
|
|
||||||
u8g_SetAddress(u8g, dev, 1); /* data mode */
|
|
||||||
u8g_WriteSequence(u8g, dev, WIDTH/8, ptr);
|
|
||||||
ptr += WIDTH/8;
|
|
||||||
y++;
|
|
||||||
}
|
}
|
||||||
u8g_SetChipSelect(u8g, dev, 0);
|
else {
|
||||||
|
u8g_WriteByte(u8g, dev, 0x080 | (y-32) ); /* y pos */
|
||||||
|
u8g_WriteByte(u8g, dev, 0x080 | 8); /* set x pos to 64*/
|
||||||
|
}
|
||||||
|
|
||||||
|
u8g_SetAddress(u8g, dev, 1); /* data mode */
|
||||||
|
u8g_WriteSequence(u8g, dev, WIDTH/8, ptr);
|
||||||
|
ptr += WIDTH/8;
|
||||||
|
y++;
|
||||||
}
|
}
|
||||||
break;
|
u8g_SetChipSelect(u8g, dev, 0);
|
||||||
|
}
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
return u8g_dev_pb32h1_base_fn(u8g, dev, msg, arg);
|
return u8g_dev_pb32h1_base_fn(u8g, dev, msg, arg);
|
||||||
}
|
}
|
||||||
|
@ -215,11 +200,9 @@ uint8_t u8g_dev_st7920_128x64_HAL_4x_buf[QWIDTH] U8G_NOCOMMON ;
|
||||||
u8g_pb_t u8g_dev_st7920_128x64_HAL_4x_pb = { {32, HEIGHT, 0, 0, 0}, WIDTH, u8g_dev_st7920_128x64_HAL_4x_buf};
|
u8g_pb_t u8g_dev_st7920_128x64_HAL_4x_pb = { {32, HEIGHT, 0, 0, 0}, WIDTH, u8g_dev_st7920_128x64_HAL_4x_buf};
|
||||||
u8g_dev_t u8g_dev_st7920_128x64_HAL_4x_sw_spi = { u8g_dev_st7920_128x64_HAL_4x_fn, &u8g_dev_st7920_128x64_HAL_4x_pb, U8G_COM_ST7920_HAL_SW_SPI };
|
u8g_dev_t u8g_dev_st7920_128x64_HAL_4x_sw_spi = { u8g_dev_st7920_128x64_HAL_4x_fn, &u8g_dev_st7920_128x64_HAL_4x_pb, U8G_COM_ST7920_HAL_SW_SPI };
|
||||||
|
|
||||||
|
|
||||||
U8G_PB_DEV(u8g_dev_st7920_128x64_HAL_hw_spi, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_st7920_128x64_HAL_fn, U8G_COM_ST7920_HAL_HW_SPI);
|
U8G_PB_DEV(u8g_dev_st7920_128x64_HAL_hw_spi, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_st7920_128x64_HAL_fn, U8G_COM_ST7920_HAL_HW_SPI);
|
||||||
u8g_dev_t u8g_dev_st7920_128x64_HAL_4x_hw_spi = { u8g_dev_st7920_128x64_HAL_4x_fn, &u8g_dev_st7920_128x64_HAL_4x_pb, U8G_COM_ST7920_HAL_HW_SPI };
|
u8g_dev_t u8g_dev_st7920_128x64_HAL_4x_hw_spi = { u8g_dev_st7920_128x64_HAL_4x_fn, &u8g_dev_st7920_128x64_HAL_4x_pb, U8G_COM_ST7920_HAL_HW_SPI };
|
||||||
|
|
||||||
|
|
||||||
#if defined(U8G_HAL_LINKS) || defined(__SAM3X8E__)
|
#if defined(U8G_HAL_LINKS) || defined(__SAM3X8E__)
|
||||||
// Also use this device for HAL version of rrd class. This results in the same device being used
|
// Also use this device for HAL version of rrd class. This results in the same device being used
|
||||||
// for the ST7920 for HAL systems no matter what is selected in ultralcd_impl_DOGM.h.
|
// for the ST7920 for HAL systems no matter what is selected in ultralcd_impl_DOGM.h.
|
||||||
|
|
Loading…
Reference in a new issue