Strip trailing spaces
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@ -39,7 +39,7 @@ int8_t libServo::attach(const int pin, const int min, const int max) {
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void libServo::move(const int value) {
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void libServo::move(const int value) {
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constexpr uint16_t servo_delay[] = SERVO_DELAY;
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constexpr uint16_t servo_delay[] = SERVO_DELAY;
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static_assert(COUNT(servo_delay) == NUM_SERVOS, "SERVO_DELAY must be an array NUM_SERVOS long.");
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static_assert(COUNT(servo_delay) == NUM_SERVOS, "SERVO_DELAY must be an array NUM_SERVOS long.");
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if (this->attach(0) >= 0) {
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if (this->attach(0) >= 0) {
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this->write(value);
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this->write(value);
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safe_delay(servo_delay[this->servoIndex]);
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safe_delay(servo_delay[this->servoIndex]);
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@ -14,7 +14,7 @@
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#elif defined(__STM32F1__) || defined(TARGET_STM32F1)
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#elif defined(__STM32F1__) || defined(TARGET_STM32F1)
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#define HAL_PLATFORM HAL_STM32F1
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#define HAL_PLATFORM HAL_STM32F1
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#elif defined(STM32F4)
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#elif defined(STM32F4)
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#define HAL_PLATFORM HAL_STM32F4
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#define HAL_PLATFORM HAL_STM32F4
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#elif defined(STM32F7)
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#elif defined(STM32F7)
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#define HAL_PLATFORM HAL_STM32F7
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#define HAL_PLATFORM HAL_STM32F7
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#else
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#else
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@ -234,7 +234,7 @@ void GcodeSuite::G28(const bool always_home_all) {
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#endif
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#endif
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(parser.seenval('R') ? parser.value_linear_units() : Z_HOMING_HEIGHT)
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(parser.seenval('R') ? parser.value_linear_units() : Z_HOMING_HEIGHT)
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);
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);
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if (z_homing_height && (home_all || homeX || homeY)) {
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if (z_homing_height && (home_all || homeX || homeY)) {
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// Raise Z before homing any other axes and z is not already high enough (never lower z)
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// Raise Z before homing any other axes and z is not already high enough (never lower z)
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destination[Z_AXIS] = z_homing_height;
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destination[Z_AXIS] = z_homing_height;
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@ -95,7 +95,7 @@ static const hd44780_charmap_t g_hd44780_charmap_device[] PROGMEM = {
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{IV('「'), 0xA2, 0},
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{IV('「'), 0xA2, 0},
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{IV('」'), 0xA3, 0},
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{IV('」'), 0xA3, 0},
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{IV('゛'), 0xDE, 0}, // ‶
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{IV('゛'), 0xDE, 0}, // ‶
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{IV('゜'), 0xDF, 0}, // '〫'
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{IV('゜'), 0xDF, 0}, // '〫'
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{IV('゠'), '=', 0},
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{IV('゠'), '=', 0},
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{IV('ァ'), 0xA7, 0},
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{IV('ァ'), 0xA7, 0},
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{IV('ア'), 0xB1, 0},
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{IV('ア'), 0xB1, 0},
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@ -407,76 +407,76 @@ void Planner::init() {
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__asm__ __volatile__(
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__asm__ __volatile__(
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// %8:%7:%6 = interval
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// %8:%7:%6 = interval
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// r31:r30: MUST be those registers, and they must point to the inv_tab
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// r31:r30: MUST be those registers, and they must point to the inv_tab
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" clr %13" "\n\t" // %13 = 0
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" clr %13" "\n\t" // %13 = 0
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// Now we must compute
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// Now we must compute
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// result = 0xFFFFFF / d
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// result = 0xFFFFFF / d
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// %8:%7:%6 = interval
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// %8:%7:%6 = interval
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// %16:%15:%14 = nr
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// %16:%15:%14 = nr
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// %13 = 0
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// %13 = 0
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// A plain division of 24x24 bits should take 388 cycles to complete. We will
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// A plain division of 24x24 bits should take 388 cycles to complete. We will
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// use Newton-Raphson for the calculation, and will strive to get way less cycles
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// use Newton-Raphson for the calculation, and will strive to get way less cycles
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// for the same result - Using C division, it takes 500cycles to complete .
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// for the same result - Using C division, it takes 500cycles to complete .
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" clr %3" "\n\t" // idx = 0
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" clr %3" "\n\t" // idx = 0
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" mov %14,%6" "\n\t"
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" mov %14,%6" "\n\t"
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" mov %15,%7" "\n\t"
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" mov %15,%7" "\n\t"
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" mov %16,%8" "\n\t" // nr = interval
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" mov %16,%8" "\n\t" // nr = interval
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" tst %16" "\n\t" // nr & 0xFF0000 == 0 ?
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" tst %16" "\n\t" // nr & 0xFF0000 == 0 ?
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" brne 2f" "\n\t" // No, skip this
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" brne 2f" "\n\t" // No, skip this
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" mov %16,%15" "\n\t"
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" mov %16,%15" "\n\t"
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" mov %15,%14" "\n\t" // nr <<= 8, %14 not needed
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" mov %15,%14" "\n\t" // nr <<= 8, %14 not needed
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" subi %3,-8" "\n\t" // idx += 8
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" subi %3,-8" "\n\t" // idx += 8
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" tst %16" "\n\t" // nr & 0xFF0000 == 0 ?
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" tst %16" "\n\t" // nr & 0xFF0000 == 0 ?
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" brne 2f" "\n\t" // No, skip this
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" brne 2f" "\n\t" // No, skip this
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" mov %16,%15" "\n\t" // nr <<= 8, %14 not needed
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" mov %16,%15" "\n\t" // nr <<= 8, %14 not needed
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" clr %15" "\n\t" // We clear %14
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" clr %15" "\n\t" // We clear %14
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" subi %3,-8" "\n\t" // idx += 8
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" subi %3,-8" "\n\t" // idx += 8
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// here %16 != 0 and %16:%15 contains at least 9 MSBits, or both %16:%15 are 0
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// here %16 != 0 and %16:%15 contains at least 9 MSBits, or both %16:%15 are 0
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"2:" "\n\t"
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"2:" "\n\t"
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" cpi %16,0x10" "\n\t" // (nr & 0xf00000) == 0 ?
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" cpi %16,0x10" "\n\t" // (nr & 0xf00000) == 0 ?
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" brcc 3f" "\n\t" // No, skip this
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" brcc 3f" "\n\t" // No, skip this
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" swap %15" "\n\t" // Swap nibbles
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" swap %15" "\n\t" // Swap nibbles
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" swap %16" "\n\t" // Swap nibbles. Low nibble is 0
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" swap %16" "\n\t" // Swap nibbles. Low nibble is 0
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" mov %14, %15" "\n\t"
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" mov %14, %15" "\n\t"
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" andi %14,0x0f" "\n\t" // Isolate low nibble
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" andi %14,0x0f" "\n\t" // Isolate low nibble
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" andi %15,0xf0" "\n\t" // Keep proper nibble in %15
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" andi %15,0xf0" "\n\t" // Keep proper nibble in %15
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" or %16, %14" "\n\t" // %16:%15 <<= 4
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" or %16, %14" "\n\t" // %16:%15 <<= 4
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" subi %3,-4" "\n\t" // idx += 4
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" subi %3,-4" "\n\t" // idx += 4
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"3:" "\n\t"
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"3:" "\n\t"
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" cpi %16,0x40" "\n\t" // (nr & 0xc00000) == 0 ?
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" cpi %16,0x40" "\n\t" // (nr & 0xc00000) == 0 ?
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" brcc 4f" "\n\t" // No, skip this
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" brcc 4f" "\n\t" // No, skip this
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" add %15,%15" "\n\t"
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" add %15,%15" "\n\t"
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" adc %16,%16" "\n\t"
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" adc %16,%16" "\n\t"
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" add %15,%15" "\n\t"
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" add %15,%15" "\n\t"
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" adc %16,%16" "\n\t" // %16:%15 <<= 2
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" adc %16,%16" "\n\t" // %16:%15 <<= 2
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" subi %3,-2" "\n\t" // idx += 2
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" subi %3,-2" "\n\t" // idx += 2
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"4:" "\n\t"
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"4:" "\n\t"
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" cpi %16,0x80" "\n\t" // (nr & 0x800000) == 0 ?
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" cpi %16,0x80" "\n\t" // (nr & 0x800000) == 0 ?
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" brcc 5f" "\n\t" // No, skip this
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" brcc 5f" "\n\t" // No, skip this
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" add %15,%15" "\n\t"
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" add %15,%15" "\n\t"
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" adc %16,%16" "\n\t" // %16:%15 <<= 1
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" adc %16,%16" "\n\t" // %16:%15 <<= 1
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" inc %3" "\n\t" // idx += 1
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" inc %3" "\n\t" // idx += 1
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// Now %16:%15 contains its MSBit set to 1, or %16:%15 is == 0. We are now absolutely sure
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// Now %16:%15 contains its MSBit set to 1, or %16:%15 is == 0. We are now absolutely sure
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// we have at least 9 MSBits available to enter the initial estimation table
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// we have at least 9 MSBits available to enter the initial estimation table
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"5:" "\n\t"
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"5:" "\n\t"
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" add %15,%15" "\n\t"
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" add %15,%15" "\n\t"
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" adc %16,%16" "\n\t" // %16:%15 = tidx = (nr <<= 1), we lose the top MSBit (always set to 1, %16 is the index into the inverse table)
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" adc %16,%16" "\n\t" // %16:%15 = tidx = (nr <<= 1), we lose the top MSBit (always set to 1, %16 is the index into the inverse table)
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" add r30,%16" "\n\t" // Only use top 8 bits
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" add r30,%16" "\n\t" // Only use top 8 bits
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" adc r31,%13" "\n\t" // r31:r30 = inv_tab + (tidx)
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" adc r31,%13" "\n\t" // r31:r30 = inv_tab + (tidx)
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" lpm %14, Z" "\n\t" // %14 = inv_tab[tidx]
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" lpm %14, Z" "\n\t" // %14 = inv_tab[tidx]
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" ldi %15, 1" "\n\t" // %15 = 1 %15:%14 = inv_tab[tidx] + 256
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" ldi %15, 1" "\n\t" // %15 = 1 %15:%14 = inv_tab[tidx] + 256
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// We must scale the approximation to the proper place
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// We must scale the approximation to the proper place
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" clr %16" "\n\t" // %16 will always be 0 here
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" clr %16" "\n\t" // %16 will always be 0 here
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" subi %3,8" "\n\t" // idx == 8 ?
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" subi %3,8" "\n\t" // idx == 8 ?
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" breq 6f" "\n\t" // yes, no need to scale
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" breq 6f" "\n\t" // yes, no need to scale
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" brcs 7f" "\n\t" // If C=1, means idx < 8, result was negative!
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" brcs 7f" "\n\t" // If C=1, means idx < 8, result was negative!
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@ -503,13 +503,13 @@ void Planner::init() {
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" or %15,%12" "\n\t" // %15:%16 <<= 4
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" or %15,%12" "\n\t" // %15:%16 <<= 4
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"16:" "\n\t"
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"16:" "\n\t"
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" sbrs %3,3" "\n\t" // shift by 8bits position?
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" sbrs %3,3" "\n\t" // shift by 8bits position?
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" rjmp 6f" "\n\t" // No, we are done
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" rjmp 6f" "\n\t" // No, we are done
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" mov %16,%15" "\n\t"
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" mov %16,%15" "\n\t"
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" mov %15,%14" "\n\t"
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" mov %15,%14" "\n\t"
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" clr %14" "\n\t"
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" clr %14" "\n\t"
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" jmp 6f" "\n\t"
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" jmp 6f" "\n\t"
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// idx < 8, now %3 = idx - 8. Get the count of bits
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// idx < 8, now %3 = idx - 8. Get the count of bits
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"7:" "\n\t"
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"7:" "\n\t"
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" neg %3" "\n\t" // %3 = -idx = count of bits to move right. idx range:[1...8]
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" neg %3" "\n\t" // %3 = -idx = count of bits to move right. idx range:[1...8]
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" sbrs %3,0" "\n\t" // shift by 1 bit position ?
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" sbrs %3,0" "\n\t" // shift by 1 bit position ?
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@ -541,7 +541,7 @@ void Planner::init() {
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// Now, we must refine the estimation present on %16:%15:%14 using 1 iteration
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// Now, we must refine the estimation present on %16:%15:%14 using 1 iteration
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// of Newton-Raphson. As it has a quadratic convergence, 1 iteration is enough
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// of Newton-Raphson. As it has a quadratic convergence, 1 iteration is enough
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// to get more than 18bits of precision (the initial table lookup gives 9 bits of
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// to get more than 18bits of precision (the initial table lookup gives 9 bits of
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// precision to start from). 18bits of precision is all what is needed here for result
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// precision to start from). 18bits of precision is all what is needed here for result
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// %8:%7:%6 = d = interval
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// %8:%7:%6 = d = interval
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// %16:%15:%14 = x = initial estimation of 0x1000000 / d
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// %16:%15:%14 = x = initial estimation of 0x1000000 / d
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@ -585,7 +585,7 @@ void Planner::init() {
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// %16:%15:%14 = x = initial estimation of 0x1000000 / d
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// %16:%15:%14 = x = initial estimation of 0x1000000 / d
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// %3:%2:%1:%0 = (1<<25) - x*d = acc
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// %3:%2:%1:%0 = (1<<25) - x*d = acc
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// %13 = 0
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// %13 = 0
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// result = %11:%10:%9:%5:%4
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// result = %11:%10:%9:%5:%4
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" mul %14,%0" "\n\t" // r1:r0 = LO(x) * LO(acc)
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" mul %14,%0" "\n\t" // r1:r0 = LO(x) * LO(acc)
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@ -599,7 +599,7 @@ void Planner::init() {
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" adc %5,r1" "\n\t"
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" adc %5,r1" "\n\t"
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" adc %9,%13" "\n\t"
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" adc %9,%13" "\n\t"
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" adc %10,%13" "\n\t"
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" adc %10,%13" "\n\t"
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" adc %11,%13" "\n\t" // %11:%10:%9:%5:%4 += MI(x) * LO(acc)
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" adc %11,%13" "\n\t" // %11:%10:%9:%5:%4 += MI(x) * LO(acc)
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" mul %16,%0" "\n\t" // r1:r0 = HI(x) * LO(acc)
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" mul %16,%0" "\n\t" // r1:r0 = HI(x) * LO(acc)
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" add %5,r0" "\n\t"
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" add %5,r0" "\n\t"
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" adc %9,r1" "\n\t"
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" adc %9,r1" "\n\t"
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" mul %16,%3" "\n\t" // r1:r0 = HI(x) * HI(acc)
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" mul %16,%3" "\n\t" // r1:r0 = HI(x) * HI(acc)
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" add %11,r0" "\n\t" // %11:%10:%9:%5:%4 += MI(x) * HI(acc) << 32
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" add %11,r0" "\n\t" // %11:%10:%9:%5:%4 += MI(x) * HI(acc) << 32
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// At this point, %11:%10:%9 contains the new estimation of x.
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// At this point, %11:%10:%9 contains the new estimation of x.
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// Finally, we must correct the result. Estimate remainder as
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// Finally, we must correct the result. Estimate remainder as
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// (1<<24) - x*d
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// (1<<24) - x*d
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// %11:%10:%9 = x
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// %11:%10:%9 = x
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// %8:%7:%6 = d = interval" "\n\t"
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// %8:%7:%6 = d = interval" "\n\t"
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" ldi %3,1" "\n\t"
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" ldi %3,1" "\n\t"
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" clr %2" "\n\t"
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" clr %2" "\n\t"
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" clr %1" "\n\t"
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" clr %1" "\n\t"
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" mul %7,%11" "\n\t" // r1:r0 = MI(d) * HI(x)
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" mul %7,%11" "\n\t" // r1:r0 = MI(d) * HI(x)
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" sub %3,r0" "\n\t" // %3:%2:%1:%0 -= MI(d) * HI(x) << 24
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" sub %3,r0" "\n\t" // %3:%2:%1:%0 -= MI(d) * HI(x) << 24
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// %3:%2:%1:%0 = r = (1<<24) - x*d
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// %3:%2:%1:%0 = r = (1<<24) - x*d
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// %8:%7:%6 = d = interval
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// %8:%7:%6 = d = interval
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// Perform the final correction
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// Perform the final correction
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" sub %0,%6" "\n\t"
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" sub %0,%6" "\n\t"
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" sbc %1,%7" "\n\t"
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" sbc %1,%7" "\n\t"
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" sbc %2,%8" "\n\t" // r -= d
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" sbc %2,%8" "\n\t" // r -= d
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" brcs 14f" "\n\t" // if ( r >= d)
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" brcs 14f" "\n\t" // if ( r >= d)
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// %11:%10:%9 = x
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// %11:%10:%9 = x
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" ldi %3,1" "\n\t"
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" ldi %3,1" "\n\t"
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" add %9,%3" "\n\t"
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" add %9,%3" "\n\t"
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" adc %10,%13" "\n\t"
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" adc %10,%13" "\n\t"
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" adc %11,%13" "\n\t" // x++
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" adc %11,%13" "\n\t" // x++
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"14:" "\n\t"
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"14:" "\n\t"
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// Estimation is done. %11:%10:%9 = x
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// Estimation is done. %11:%10:%9 = x
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" clr __zero_reg__" "\n\t" // Make C runtime happy
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" clr __zero_reg__" "\n\t" // Make C runtime happy
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// [211 cycles total]
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// [211 cycles total]
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: "=r" (r2),
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: "=r" (r2),
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"=r" (r3),
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"=r" (r3),
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@ -500,7 +500,7 @@ static bool do_probe_move(const float z, const float fr_mm_m) {
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while (thermalManager.isHeatingBed()) safe_delay(200);
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while (thermalManager.isHeatingBed()) safe_delay(200);
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lcd_reset_status();
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lcd_reset_status();
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}
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}
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#endif
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#endif
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// Deploy BLTouch at the start of any probe
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// Deploy BLTouch at the start of any probe
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#if ENABLED(BLTOUCH)
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#if ENABLED(BLTOUCH)
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// Misc. Functions
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// Misc. Functions
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//
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//
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//#define CASE_LIGHT_PIN_CI PF13
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//#define CASE_LIGHT_PIN_CI PF13
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//#define CASE_LIGHT_PIN_DO PF14
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//#define CASE_LIGHT_PIN_DO PF14
|
||||||
//#define NEOPIXEL_PIN PF13
|
//#define NEOPIXEL_PIN PF13
|
||||||
|
|
||||||
//
|
//
|
||||||
|
@ -148,24 +148,24 @@
|
||||||
#define SS_PIN PE7
|
#define SS_PIN PE7
|
||||||
#define LED_PIN PB7 //Alive
|
#define LED_PIN PB7 //Alive
|
||||||
#define PS_ON_PIN PA10
|
#define PS_ON_PIN PA10
|
||||||
#define KILL_PIN PA8
|
#define KILL_PIN PA8
|
||||||
#define PWR_LOSS PA4 //Power loss / nAC_FAULT
|
#define PWR_LOSS PA4 //Power loss / nAC_FAULT
|
||||||
|
|
||||||
//
|
//
|
||||||
// LCD / Controller
|
// LCD / Controller
|
||||||
//
|
//
|
||||||
|
|
||||||
#define SD_DETECT_PIN PA15
|
#define SD_DETECT_PIN PA15
|
||||||
#define BEEPER_PIN PC9
|
#define BEEPER_PIN PC9
|
||||||
#define LCD_PINS_RS PE9
|
#define LCD_PINS_RS PE9
|
||||||
#define LCD_PINS_ENABLE PE8
|
#define LCD_PINS_ENABLE PE8
|
||||||
#define LCD_PINS_D4 PB12
|
#define LCD_PINS_D4 PB12
|
||||||
#define LCD_PINS_D5 PB13
|
#define LCD_PINS_D5 PB13
|
||||||
#define LCD_PINS_D6 PB14
|
#define LCD_PINS_D6 PB14
|
||||||
#define LCD_PINS_D7 PB15
|
#define LCD_PINS_D7 PB15
|
||||||
#define BTN_EN1 PC4
|
#define BTN_EN1 PC4
|
||||||
#define BTN_EN2 PC5
|
#define BTN_EN2 PC5
|
||||||
#define BTN_ENC PC3
|
#define BTN_ENC PC3
|
||||||
|
|
||||||
//
|
//
|
||||||
// Filament runout
|
// Filament runout
|
||||||
|
|
Loading…
Reference in a new issue