[2.0.x][LPC176x] Fix binary linking broken by pio update (#11026)

Marlin/src/HAL/HAL_LPC1768/lpc1768_flag_script.py

@@ -22,6 +22,7 @@ if __name__ == "__main__":
 
                     # For MarlinFirmware/U8glib-HAL
                     "-IMarlin/src/HAL/HAL_LPC1768/u8g",
+                    "-DU8G_HAL_LINKS",
 
                     "-MMD",
                     "-MP",
@@ -48,11 +49,12 @@ else:
           "-fno-threadsafe-statics"
       ],
       LINKFLAGS=[
+          "-Wl,-Tframeworks/CMSIS/LPC1768/Re-ARM/LPC1768.ld,--gc-sections",
           "-Os",
           "-mcpu=cortex-m3",
           "-mthumb",
           "--specs=nano.specs",
           "--specs=nosys.specs",
-          "-u_printf_float",
+          "-u_printf_float"
       ],
   )

frameworks/CMSIS/library.json

@@ -11,8 +11,7 @@
       "src_filter": "+<LPC1768/*>",
       "flags": [
         "-ILPC1768/include",
-        "-ILPC1768/lib",
+        "-ILPC1768/lib"
-        "-Wl,-Tframeworks/CMSIS/LPC1768/Re-ARM/LPC1768.ld,--gc-sections"
     ]
   }
 }

platformio.ini

@@ -150,10 +150,10 @@ monitor_speed = 250000
 platform          = nxplpc
 board             = lpc1768
 board_build.f_cpu = 100000000L
-build_flags       = !python Marlin/src/HAL/HAL_LPC1768/lpc1768_flag_script.py
+# Override default maximum RAM. LPC1768/9 do have 64k, but in 3 blocks (32K, 16K, 16K).
-  ${common.build_flags}
+# The first 32k block is used by default, while the others must be specifically targeted.
-  -DU8G_HAL_LINKS
+board_upload.maximum_ram_size = 32768
-src_build_flags   = -Wall
+build_flags       = !python Marlin/src/HAL/HAL_LPC1768/lpc1768_flag_script.py ${common.build_flags}
 build_unflags     = -Wall
 lib_ldf_mode      = off
 lib_extra_dirs    = frameworks